9results about How to "Improve output linearity" patented technology

The invention provides an infrared detector reading circuit based on a dark current suppression structure, which comprises a dark current suppression circuit, an integrating circuit, a double sampling circuit, a source follower, a differential amplification circuit and an output buffer circuit which are electrically connected in sequence, and also comprises a sequential logic circuit, the dark current suppression circuit is used for generating a controllable current which is not influenced by temperature change, and the current is mirrored and then used for counteracting the dark current of the infrared detector; the sequential logic circuit is used for providing row selection logic, column selection logic and a sampling time sequence when a target pixel is selected from an infrared detector pixel array; the reading circuit can read the current signal of the target pixel according to the row selection logic, the column selection logic and the sampling time sequence; according to the invention, the signal-to-noise ratio of the readout system is improved by suppressing dark current, the function of reading out according to the column is realized based on the sequential logic circuit, the noise interference among the readout circuits in the array can be effectively reduced, and the focal plane array readout circuit is suitable for preparing a large-array-scale focal plane array readout circuit.

The application provides a new hybrid nested noise shaping architecture suitable for noise shaping SAR ADC, which adopts a dynamic working closed-loop cascode FIA as a residual amplifier to reduce power consumption by eliminating the static current of the amplifier and removing the gain calibration circuit; the shaping architecture performs fourth-order noise shaping through the nested second-order CIFF and second-order EF noise shaping loops to achieve high precision in noise shaping at the same oversampling rate, and integrates the sampling noise cancellation (SNC) method to reduce the capacitance of the sampling capacitor to save chip area; the architecture adopts a closed-loop cascode FIA as a residual amplifier and CIFF and EF as noise shaping loops to solve the problem that the traditional noise shaping SAR ADC is difficult to simultaneously achieve high precision and low power consumption. In addition, the sampling KT / C noise cancellation (SNC) technology is integrated to reduce the capacitance of the sampling capacitor and save chip area.

The application discloses an R-2R digital-analog converter with an auxiliary calibration structure and relates to the technical field of high-precision digital-analog conversion. The converter comprises a main DAC, a calibration quantity calculation module, a compensation code generation module, an auxiliary DAC and an operational amplifier circuit. The main DAC converts a digital input into an analog current. The calibration quantity calculation module generates a 15-bit compensation code containing a 1-bit sign bit and a 14-bit data bit through a 24-bit ADC, a comparator and successive approximation logic, and only calibrates the high 12 bits of the main DAC bit by bit, and the low 4 bits do not need to be calibrated. The compensation code generation module generates a total compensation code through gating by a multiplexer and superposition by an adder. The auxiliary DAC is a 14-bit binary current type structure, and realizes bidirectional compensation in cooperation with a positive and negative reference voltage source. The application has the advantages of short calibration period, small storage consumption, no need for additional bias calibration, excellent linearity, and suitability for application in the fields of wireless communication, biological medicine and the like, and meets the application requirements of high resolution and high precision.

The invention provides a novel hybrid nested noise shaping architecture suitable for a noise shaping SAR ADC (Synthetic Aperture Radar Analog to Digital Converter), the shaping architecture adopts a dynamically working closed-loop cascode FIA as a residual amplifier, so that the power consumption is reduced by eliminating the quiescent current of the amplifier and removing a gain calibration circuit; the shaping architecture executes fourth-order noise shaping through a second-order CIFF and a second-order EF noise shaping loop which are nested so as to achieve high precision during noise shaping at the same oversampling rate, and the shaping architecture reduces the capacitance value of a sampling capacitor through an integrated sampling noise cancellation (SNC) method so as to save the area of a chip; according to the architecture, a closed-loop cascode FIA is used as a residual amplifier, and a CIFF and an EF are used as noise shaping loops, so that the problem that high precision and low power consumption are difficult to realize simultaneously by a traditional noise shaping SAR ADC is solved. In addition, a sampling KT / C noise cancellation (SNC) technology is also integrated, so that the capacitance value of a sampling capacitor is reduced, and the area of a chip is saved.

The present invention belongs to the technical field of current measurement, and specifically relates to a self-compensating button-type current detection device and a detection method thereof, wherein an upper end cover, a positioning plate and a package are fixed by bolts, and the upper end cover, the positioning plate and the package each have an arc-shaped groove to realize the positioning of a measured cable; a plurality of bosses with different heights are provided on the lower bottom surface inside the package, and each boss has a different distance from the inner wall surface of the package, a piezoelectric layer is fixed on the boss, a permanent magnet is fixed on the piezoelectric layer, all structures fixed on each boss are completely the same in size, and a single-chip microcomputer is fixed on the inner surface parallel to the central axis of a circular hole formed by four arc-shaped grooves; the present invention can measure direct current and alternating current, and can be self-powered, and has the characteristics of high linearity, high precision, simple structure, easy maintenance, wide application range, etc.

The invention relates to the technical field of magnetic variable measurement, and discloses a closed-loop fluxgate current detection system, which is characterized in that a self-excited oscillation unit is connected with a PAC conversion unit, the PAC conversion unit is connected with an integration unit, the duty ratio of a square wave signal is converted into a voltage deviation signal, and the voltage deviation signal is provided for the integration unit; the integration unit is connected with the feedback compensation unit and is used for integrating the voltage deviation signal and providing an integration voltage; the self-excited oscillation unit adopts a symmetrical driving structure comprising an analog switch, and provides a square wave signal representing a duty ratio for the PAC conversion unit; and the feedback compensation unit is connected with the compensation winding, outputs a voltage signal in proportion to the current to be detected and drives the compensation winding to generate a counteracting magnetic field so as to form closed-loop detection. The problems of low bandwidth, zero drift, structure limitation and high cost in the prior art are solved, and the purposes of high bandwidth, openable installation, low ripple output, high precision and extremely high symmetry and consistency are achieved.

The invention discloses an LVDT high-frequency signal processing circuit, and relates to the field of displacement sensors, and the circuit comprises a primary coil excitation module which is combined with a DDS frequency source and an AGC amplitude stabilization control circuit to provide a high-frequency excitation signal for an LVDT; the secondary coil signal processing module adopts a lossless rectification circuit to losslessly rectify an output signal of the LVDT; the lossless rectification circuit comprises an input isolation and bias circuit, an isolation low-pass filter and an analog switch. The input isolation and bias circuit performs isolation and bias processing on the output signal, and outputs analog signals which have bias amounts and have a phase difference of 180 degrees under two different channels; the isolation low-pass filter prevents burr signals of the analog switch from being transmitted forwards; the analog switch selectively accesses two analog signals with the phase difference of 180 degrees to the output channel under the control of the digital control signal, and outputs a lossless rectified signal, the requirement of a high-frequency LVDT for a high-frequency excitation source is met, and the dead zone problem caused by diode conduction voltage drop does not exist.

The invention discloses a polymer-based cascaded Mach-Zehnder weak voltage sensor, which comprises an upper cladding, a core layer and a lower cladding, and is characterized in that the core layer of the sensor comprises a first-stage Mach-Zehnder electro-optical modulator and a second-stage Mach-Zehnder electro-optical modulator which are connected with each other through a 180-degree bent optical waveguide; wherein the half-wave voltage of the first-stage Mach-Zehnder electro-optical modulator is higher than that of the second-stage Mach-Zehnder electro-optical modulator, and two electric signal paths are arranged in each of the first-stage Mach-Zehnder electro-optical modulator and the second-stage Mach-Zehnder electro-optical modulator; and the output light intensity of the second-stage Mach-Zehnder electro-optical modulator is used for representing a weak voltage signal. The sensor overcomes the defect that a traditional silicon-based material Mach-Zehnder electro-optical modulator is high in half-wave voltage. The electro-optical modulator adopting the two-stage Mach-Zehnder cascade structure has the characteristics of linear output and small size, and is a weak voltage sensing photonic device which is resistant to electromagnetic interference and high in sensitivity.

The invention belongs to the technical field of data processing of the computer information disciplinary, and relates to a broadband power amplifier linearization method and system based on predistortion, and the method comprises the steps: collecting and preprocessing a radio frequency input baseband signal, an actual output baseband signal and tube core heat flow data of a broadband power amplifier, and obtaining an initial data set; calculating a transient heat dissipation gradient at each sampling moment based on the signal energy difference and the tube core temperature change rate; in combination with broadband distribution characteristics of radio frequency input baseband signals, broadband thermal teratogenesis factors at all sampling moments are obtained; performing dynamic tracking compensation on a cross term coefficient of a generalized memory polynomial based on the distortion factor to obtain an update coefficient; and the pre-distortion signal is reconstructed by utilizing the updating coefficient, so that high-linearity output of the broadband power amplifier is realized. The dynamic response speed of coefficient updating can be improved, thermally induced nonlinear distortion of a power amplifier is effectively offset, and the linearity and stability of a high-power broadband radio frequency test are improved.