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208 results about "Large array" patented technology

Aliasing image intelligent deformation small target identification algorithm based on detector multiplexing

The invention relates to an aliasing image intelligent deformation small target identification algorithm based on detector multiplexing, and relates to the technical field of aliasing image target identification, and the algorithm comprises the steps: designing a detector multiplexing optical system; designing a view field coding element, and splicing the whole system; simulating and generating a motion track of the early warning target under the space-based background; the target motion trail is imaged through a detector multiplexing optical system; aliasing video simulation of moving target imaging is carried out; an intelligent deformation small target recognition algorithm is applied to the aliasing image, and a moving target is recognized; target resolution and field-of-view positioning are realized by using the relevance between the inter-frame track of the moving target and the light spot shape. According to the aliasing image intelligent deformation small target recognition algorithm based on detector multiplexing, light originally imaged on a large-area-array detector is folded and imaged on a small-area-array detector, and therefore the purpose that the small-area-array detector receives large-view-field imaging is achieved.
Owner:CHANGCHUN INST OF OPTICS FINE MECHANICS & PHYSICS CHINESE ACAD OF SCI

Signaling methods of aggregating CSI-RS resources for large arrays

Systems and methods of signaling aggregating Channel State Information Reference Signal (CSI-RS) resources for large arrays are provided. In some embodiments, a method performed by a User Equipment (UE) includes: being configured with channel measurement resources in channel measurement resource sets; receiving an indication grouping the channel measurement resources subsets; aggregating antenna ports in the measurement resources within each of the one or more subset of channel measurement resources wherein a total number of antenna ports is larger than 32 ports; performing channel measurements over the total number of antenna ports; computing one or more Channel State Information (CSI) based on the one or more subset; and reporting the one or more computed CSIs to a network node. In this way, the network node can efficiently signal to the UE which legacy CSI-RS resources can be aggregated to form aggregated CSI-RS resources that contain a larger number of CSI-RS ports.
Owner:TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)

Wide-angle scanning transmit-receive duplex common-aperture phased-array antenna

The invention discloses a wide-angle scanning transmit-receive duplex common-aperture phased-array antenna, and belongs to the technical field of spaceborne antennas. The phased-array antenna is formed by periodically arranging and expanding a plurality of basic common-aperture units to form a dual-band dual-circular polarization structure. Each basic common-caliber unit comprises a receiving antenna unit, a transmitting antenna unit and a short-circuit grounding pi-type decoupling network. The transmitting-receiving common-caliber phased array antenna has the advantages of high unit isolation and large array scanning angle, and can meet the requirements of satellite communication, remote sensing and telemetering, mobile phone direct connection satellite communication and the like on a wide-angle scanning transmitting-receiving duplex common-caliber phased array.
Owner:XIAN INSTITUE OF SPACE RADIO TECH

Antenna array, radar, electronic device and vehicle

The embodiment of the invention provides an antenna array, a radar, electronic equipment and a vehicle, and belongs to the technical field of antennas. Wherein the antenna array comprises a transmitting antenna array and a receiving antenna array. The transmitting antenna array and the receiving antenna array are used for forming a virtual array. The transmitting antenna array comprises at least two transmitting sub-arrays which are arranged at intervals in the first direction, and the distance between every two adjacent transmitting sub-arrays in the first direction is smaller than or equal to the aperture length of the receiving antenna array in the second direction. The receiving antenna array comprises at least two receiving sub-arrays arranged along the second direction, and each receiving sub-array comprises at least two receiving antennas arranged at intervals along the second direction. And the receiving antenna array satisfies the relational expression: 0 < dn-dn-1 < = 0.5 lambda. The antenna array provided by the embodiment of the invention has the characteristics of large array aperture, high resolution, no grating lobe and low side lobe.
Owner:SHANGHAI HUAWEI TECH CO LTD

Aircraft back large array plane mounting structure

The invention belongs to the technical field of aviation, and relates to an aircraft back large array plane mounting structure. Comprising a wave-transparent radome (1), an array plane antenna mounting platform (2) and an array plane antenna (3), the array plane antenna mounting platform (2) is made of a pre-stretching plate 7075-T7451-delta material, the whole array plane antenna mounting platform (2) is machined and formed by a numerical control machine tool, the inner shape of the array plane antenna mounting platform (2) is attached to the outer shape of the upper portion of an aircraft skin, and the upper surface of the array plane antenna mounting platform (2) is a plane; the array antenna mounting platform (2) is fixedly connected with an aircraft skin through the platform connecting bolt supporting plate nut standard component (5); the array antenna (3) is mounted on the upper surface of the array antenna mounting platform (2); the shape of the rectification wave-transparent cover (1) is symmetrical to the symmetrical center line of the airplane.
Owner:SHAANXI AIRCRAFT CORPORATION

Low-leakage nedmos and ldmos devices

PCT designated stage expiredWO2025155567A1MOSFETLDMOS
A number of MOSFET architectures provide high-voltage capability (both drain-source breakdown voltage BVDSS and ON-state breakdown voltage BVON), low current leakage, and extended linearity. Embodiments of the invention overcome the limitations of conventional NEDMOS and LDMOS device designs by providing a low-resistance path for hole collection and by purposefully exhibiting multiple voltage thresholds VTH in different segments of the device. Embodiments includes NEDMOS and LDMOS device designs having multiple body contact regions for improved hole collection, sub-gate doped stripes or segments for even better hole collection and linearity, and sub-gate doped edge regions for increased local VTH and thus decreased current leakage. P– hole-collection stripes and P+ body contact regions may be formed of a semiconductor material that includes germanium. The inventive MOSFETs may be arranged as multi-MOSFET array elements, and multiple array elements may be arranged in a larger array.
Owner:PSEMI CORP

Wideband extremely large array antenna system and OFDM-based hybrid beamforming method for hybrid-field interference control of the same

This disclosure relates to a wideband extremely large array antenna system and an OFDM-based hybrid beamforming for hybrid-field interference control of the same. The wideband extremely large array antenna system for OFDM-based hybrid beamforming of this disclosure may include a transmitter having a plurality of transmit antennas, and a receiver capable of communication with the transmitter and having a plurality of receiving antennas, and the system may be configured to perform a first step for designing a common analog beamforming matrix for all subcarriers between the transmitter and the receiver, and a second step for designing a baseband beamforming matrix for each of the subcarriers.
Owner:KOREA ADVANCED INST OF SCI & TECH

Super-resolution communication perception integration method and system based on sparse MIMO

The invention discloses a super-resolution communication perception integration method and system based on sparse MIMO, and belongs to the field of wireless communication and signal processing. Signals emitted by all users are received through a sparse array, and signal processing is carried out to estimate the two-dimensional angle of arrival of the users; pairing the two-dimensional angles by using a permutation matrix; a beam forming matrix is constructed by matching the estimated angle, and channel gain is estimated by using a small amount of pilot frequency, so that super-resolution two-dimensional sensing and efficient channel estimation of users in the system are realized. According to the method, the characteristic of large array aperture of the sparse array is combined, the problem of low positioning precision of dense distribution of multiple users is solved under the condition of not increasing hardware loss, a large amount of pilot frequency resources are saved, and the channel estimation precision is further improved.
Owner:SOUTHEAST UNIV

Low-Leakage NEDMOS and LDMOS Devices

PendingUS20250241004A1TransistorMOSFETLDMOS
A number of MOSFET architectures provide high-voltage capability (both drain-source breakdown voltage BVDSS and ON-state breakdown voltage BVON), low current leakage, and extended linearity. Embodiments of the invention overcome the limitations of conventional NEDMOS and LDMOS device designs by providing a low-resistance path for hole collection and by purposefully exhibiting multiple voltage thresholds VTH in different segments of the device. Embodiments includes NEDMOS and LDMOS device designs having multiple body contact regions for improved hole collection, sub-gate doped stripes or segments for even better hole collection and linearity, and sub-gate doped edge regions for increased local VTH and thus decreased current leakage. P− hole-collection stripes and P+ body contact regions may be formed of a semiconductor material that includes germanium. The inventive MOSFETs may be arranged as multi-MOSFET array elements, and multiple array elements may be arranged in a larger array.
Owner:PSEMI CORP

Array optimization method, device and equipment for agricultural machine positioning, medium and program product

The invention relates to the technical field of wireless communication, and provides an array optimization method and device for agricultural machinery positioning, equipment, a medium and a program product, and the method comprises the steps: determining the position of each array element in a to-be-optimized wireless communication array, and determining a to-be-optimized group matrix based on the position of each array element; taking the maximum array aperture and the minimum array element spacing as constraint conditions, using the Cramer-Rao bound as a fitness evaluation criterion, and based on an adaptive spider bee optimization algorithm, performing sparse optimization solution on the group matrix to obtain an array element position map of a sparse optimization array; and agricultural machine positioning is carried out based on the array element position map of the sparse optimization array. According to the array optimization method and device for agricultural machine positioning, the equipment, the medium and the program product provided by the invention, the accuracy and efficiency of signal transmission are remarkably improved while the communication coverage range and quality are ensured, so that the agricultural machine positioning precision is improved.
Owner:SHIHEZI UNIVERSITY

Reflection type all-dielectric polarization beam combining grating for any wave band

The invention discloses a reflective all-dielectric polarization beam-combining grating suitable for any wave band. The reflective all-dielectric polarization beam-combining grating is composed of a grating etching layer, a phase matching layer, a periodic film system and a grating substrate in sequence from top to bottom. The invention has the characteristics of easy preparation, wide band and high diffraction efficiency, can effectively solve the problems of low PBS anti-laser damage threshold and low synthesis efficiency in the current polarization beam combination technology, and provides solid component support for the realization of the larger array scale and higher power laser synthesis technology in the future.
Owner:SHANGHAI INST OF OPTICS & FINE MECHANICS CHINESE ACAD OF SCI

Beam forming optimization method of ISAC system based on reconfigurable antenna structure

The invention provides a beam forming optimization method for an ISAC system based on a reconfigurable antenna structure, and the method comprises the steps: firstly, designing an energy-saving DFBS based on a TTD reconfigurable antenna architecture based on a downlink terahertz large-scale MIMO ISAC system; the DFBS is switched between the modular MIMO and the uniform MIMO by dynamically controlling the antenna sub-arrays; in the sensing stage, modular MIMO is deployed, and a larger array aperture is realized by using fewer antennas; the beam dispersion effect at the main lobe and the grating lobe is utilized to realize rapid user perception; in the communication stage, uniform MIMO is adopted, and a TTD network is activated to reduce the near-field beam dispersion effect; then, based on the channel state information obtained in the sensing stage, proposing a joint optimization problem of analog / digital hybrid beam forming and TTD network delay so as to maximize a system sum rate; finally, analog beam forming and time delay are designed through a serial time delayer method, and then alternating iteration optimization solution is carried out on digital beam forming.
Owner:HENAN UNIVERSITY OF TECHNOLOGY

MIMO frequency modulation millimeter wave radar array reconfigurable array mode sharing method

A reconfigurable array mode sharing method for an MIMO frequency modulation millimeter wave radar array comprises the steps that distance dimension fast Fourier transform and speed dimension fast Fourier transform are carried out on echo signal data matrixes obtained after analog-to-digital conversion is carried out on the basis of different modes, and distance Doppler spectrums of different receiving and transmitting antenna combinations are obtained; different modes with the same gain of the MIMO radar system are combined, the mode corresponding to the maximum virtual array aperture in the horizontal direction and the maximum virtual array aperture in the pitching direction under the gain is selected from the combination with the same gain, the two modes are subjected to angle solution and matching, angle solution of the maximum virtual array aperture is achieved in a combined mode, and the maximum virtual array aperture is obtained. A digital beam forming method is used for matching angle information of the two dimensions obtained by solving under a horizontal dimension virtual array and a pitching dimension virtual array with the maximum aperture. According to the invention, when a virtual array reconfigurable technology or an MIMO technology is used, the maximum array aperture in the original same gain mode can be effectively increased by using the complementary effect between different reconfigurable array modes.
Owner:SJTU-PINGHU INSTITUTE OF INTELLIGENT OPTOELECTRONICS

Zero carry mismatch extensible digit type high-precision photon flight time timing circuit

The invention relates to a zero carry mismatch digit-expandable high-precision photon flight time timing circuit, and belongs to the technical field of photoelectric detection / three-dimensional laser radar. The device comprises a photosensitive element, a photosensitive element pixel circuit connected with the photosensitive element, a timing circuit connected with the photosensitive element pixel circuit, and a data reading circuit connected with the timing circuit. The timing circuit comprises a time-to-digital conversion circuit which is connected with a peripheral clock and time sequence control circuit and comprises a high-precision low-order sampling circuit and a high-order sampling circuit, and a mismatch correction circuit which is connected with the time-to-digital conversion circuit and comprises a phase jump trigger circuit and a digital continuity comparison circuit. And the carry mismatch correction circuit is connected with the flip detection circuit and comprises a numerical value continuity comparison circuit. According to the invention, the problems of high error code of timing quantization, non-monotonous timing result and reduced timing precision when a timing circuit is applied to a device with a larger array scale can be solved, the time quantization range is expanded, and the timing precision of practical application is improved.
Owner:THE 44TH INST OF CHINA ELECTRONICS TECH GROUP CORP

Broadband XL-MIMO-oriented near-field CSI distributed estimation method

The invention discloses a near-field CSI distributed estimation method for broadband XL-MIMO, and the method comprises the steps: firstly, enabling a center LPU to estimate a path time delay parameter of a center sub-array channel, enabling other LPUs to rapidly extrapolate the path time delay parameters of other sub-array channels, and transmitting an estimation result to a CPU; then, based on near-field wave beam squint and parameter symmetry characteristics brought by a large array and a large bandwidth, the CPU fuses time delay parameters estimated by different sub-arrays, and decouples and independently estimates near-field channel parameters including angle, distance and range parameters; then, the CPU transmits the estimated near-field channel parameters back to the LPUs, and each LPU independently estimates the path gain of the sub-array channel; and finally, transmitting the estimated path gain to a CPU (Central Processing Unit) by the LPUs, and further reconstructing a full-dimensional broadband near-field channel. The problems that the CSI acquisition calculation complexity is too high and the reconstruction precision is low in a large-array and large-bandwidth scene are solved.
Owner:SOUTHEAST UNIV

Small-pixel-size infrared detector reading circuit with self-adaptive integrating capacitor

The invention relates to a small-pixel-size infrared detector reading circuit with a self-adaptive integrating capacitor, and belongs to the technical field of infrared detector reading circuits. According to the circuit, the NMOS variable capacitor is adopted to replace a traditional capacitor, and the characteristic that the capacitance value of the NMOS variable capacitor is adaptively adjusted along with the change of light intensity is utilized, so that the condition of supersaturation or underexposure of integral charge quantity is effectively avoided, and the dynamic range of the reading circuit is enlarged. Besides, the circuit adopts a folding cascode operational amplifier, good injection efficiency and linearity are guaranteed, the scheme that four pixels share one CTIA structure in a time-sharing mode is adopted, the layout area of the reading circuit is optimized, and the reading circuit can adapt to infrared detectors with smaller pixels and larger arrays. The circuit is simple in structure and easy to realize, has the advantages of low power consumption, wide dynamic range and the like, and is suitable for the design of an intelligent infrared detector reading circuit with high integration, low power consumption and wide dynamic range.
Owner:CHONGQING UNIV OF POSTS & TELECOMM +1

Super-large array multi-chip packaging structure, multi-chip packaging process and detection method thereof

The invention relates to the technical field of chip packaging, in particular to a super-large array multi-chip packaging structure, a multi-chip packaging process and a detection method thereof, the packaging structure is used for packaging a plurality of chips on a tube shell, the packaging structure comprises a placing groove formed in the tube shell, the plurality of chips are arranged in the placing groove, and the chip packaging process is used for packaging the plurality of chips on the tube shell. A surface bonding pad used for being electrically connected with the chip is further arranged in the containing groove. Through the distribution mode of combining the tube shell with the bonding pads on the front surface and the back surface, the electrical connection of the chip can be effectively improved, and the connection mode not only ensures that the distance between transition leads on the upper surface and the lower surface is shortest, reduces signal noise and prevents signal distortion, but also facilitates wiring and welding of a flexible board; the problem of chip buckling deformation can be effectively reduced through a step-by-step packaging process, and the mounting position precision of the chip and the lens can be ensured to be within a required range through position precision detection, so that the precision of the chip and the lens during packaging is realized.
Owner:WUHAN HAIFEITONG OPTOELECTRONICS TECH CO LTD

A row data scanning readout circuit for an image sensor

ActiveCN115883993BSimple structurelower vertical heightHemt circuitsVoltage reference
The present invention provides a row data scanning readout circuit of an image sensor, comprising: a pixel array, comprising a plurality of pixel units; the input end of the electrical signal conversion module is electrically connected to the output end of the pixel unit; the input end of the row data latch is electrically connected to the output end of the electrical signal conversion module; the input end of the readout unit is electrically connected to the output end of the row data latch; the output end of the readout unit is electrically connected to the input end of the data processing module through a data bus, the data processing module comprises a comparator, the positive input end of the comparator is electrically connected to the data bus, the reverse input end of the comparator inputs a reference voltage, and the comparator compares the voltage difference between the data bus voltage and the reference voltage to realize data reading. The row data scanning readout circuit of an image sensor disclosed by the present invention can ensure the accurate output of data during large array and long distance transmission.
Owner:合肥海图微电子有限公司

In-memory computing accelerator using high-density operation circuit and low-power sense amplifier as peripheral circuit

An in-memory computing (IMC) accelerator using a high-density operation circuit and a low-power sense amplifier as a peripheral circuit includes a plurality of dynamic random-access memory (DRAM) banks each including a pair of cell arrays, a data supply logic, a memory, and a controller for IMC, a global SRAM, and a top-level controller, wherein the cell array includes a plurality of subarrays, each of the subarrays includes a DRAM array including a big array and a little array, and an arithmetic circuit configured to perform an operation, and the arithmetic circuit includes a sense amplifier configured to amplify a bit line voltage difference, and a compact multiply-accumulate (MAC)-single instruction multiple data (SIMD) unit (CMSU) for an MAC operation and an SIMD operation, so that functionality of an in-memory operation is diversified.
Owner:KOREA ADVANCED INST OF SCI & TECH

Liquid nitrogen test Dewar for large-area-array detector

The liquid nitrogen testing Dewar comprises a cold end cold head, a variable-temperature cold head, a variable-temperature rotating block, a transition block, a loading cold head, the large-area-array detector, an optical window, a liquid nitrogen storage cavity and a shell. The cold energy of the liquid nitrogen storage cavity forms a solid conduction path through the cold-end cold head, the variable-temperature cold head and the loading cold head, and the variable-temperature cold head and the loading cold head adopt a low-heat-conduction hollow structure to construct a basic temperature difference; the variable-temperature rotating block is connected with the variable-temperature cold head and the transition block in a threaded fit mode, and the cooling capacity obtaining degree of the object carrying cold head is changed by means of position adjustment. According to the invention, flexible and accurate temperature control within the range of 80K-180K can be realized, the cooling capacity transmission is efficient, the use is convenient, and the device is suitable for testing and screening of large-area-array detectors with different temperature requirements.
Owner:SHANGHAI INSTITUTE OF TECHNICAL PHYSICS CHINESE ACADEMY OF SCIENCES

Asymmetric optical resonance avalanche photodiode and photosensitive array

The invention provides an avalanche photodiode with asymmetric optical resonance and a photosensitive array, and the avalanche photodiode comprises an electrode layer which is internally provided with a first windowing region; the top reflecting mirror is arranged in the first windowing area, the transmittance of the incident side of the top reflecting mirror to the light with the target wavelength is higher than a preset transmittance threshold value, and the reflectivity of the emergent side of the top reflecting mirror to the light with the target wavelength is higher than a preset reflectivity threshold value; the substrate is arranged on the emergent side of the top reflecting mirror; the buffer layer is arranged on one side, deviating from the top reflecting mirror, of the substrate; the active region is arranged on the side, away from the top reflector, of the buffer layer; and a bottom high reflective metal film. The top reflector and the bottom high-reflectivity metal film form an asymmetric optical resonant structure, and the purposes of filtering and absorption enhancement are achieved. And the bottom high-reflection metal film is low in process difficulty and suitable for preparation of large-array devices.
Owner:THE 44TH INST OF CHINA ELECTRONICS TECH GROUP CORP

Ultra-large array plane radar satellite decoupling vacuum thermal test method

The invention provides an ultra-large array plane radar satellite decoupling vacuum thermal test method, which comprises the following steps of: arranging a satellite and radar antennas in a vacuum tank, detaching the radar antennas from the satellite, arranging the radar antennas on one side of the satellite side by side, and respectively arranging infrared simulation devices around the satellite to simulate external thermal flow; a wave absorbing device is arranged on an antenna array plane to absorb microwaves and simulate external heat flow, the power level of an infrared simulation device is adjusted according to the heat radiation level of the satellite surface, the power level of the wave absorbing device is adjusted according to the microwave emission power and the heat radiation level of the antenna array plane, and a vacuum thermal test is performed on the satellite and the antenna. According to the invention, vacuum thermal tests on a satellite and a radar antenna due to an overlarge antenna array plane can be avoided, a whole-satellite microwave wireless emission state test can be carried out, extremely high-risk operation caused by hanging and unfolding in an antenna tank is avoided after the antenna and the satellite are decoupled, the tank occupation period of links such as test state establishment and withdrawal is greatly shortened, and the test efficiency is improved. And the model development efficiency is improved.
Owner:SHANGHAI INST OF SATELLITE EQUIP

Luggage parcel safe deposit and rapid pick-up system

A code scanner is arranged on a cabinet body, a cabinet door can vertically rotate along the side edge, a rotating shaft of the cabinet door is arranged in one side line of a storage space, a pop-up mechanism is arranged between the rotating shaft of the cabinet door and the storage space, and a magnetic lock is arranged between the free vertical edge of the cabinet door and the free vertical edge of the storage space. The magnetic locks are electrically connected with the code scanners, the storage spaces are arranged on the cabinet body into a plurality of isometric arrays according to the size of the opening, the area lamp strips are arranged on the cabinet body to surround the array defined by the storage spaces, the control ends of the area lamp strips are connected with the code scanners, and the display lamp panels are arranged on the vertical side faces, where cabinet door rotating shafts are arranged, in the storage spaces. According to the device, the built-in side lamp is adopted, when the cabinet door of the box body pops up, the door opening direction is lightened, so that the popped-up cabinet door is easier to find, the problems that the popped-up cabinet door is large in springback amplitude and not easy to find are solved, the cabinet position finding speed of a user is further increased, and the purpose of shortening the residence time of an airport is achieved.
Owner:BEIJING CHINA SOUTHERN AIRLINES GROUND SERVICES CO LTD

Modular manifold for use with a microfluidics chip and having two-way and three-way plate manifolds and method of making the same

A modular manifold having two-way and three-way plate manifolds and a method of making the same. The modular manifold is intended to replace the large array of valves (interconnected with tubing) typically needed in medical, industrial, or analytical applications, thereby reducing the required footprint. The modular manifold includes one or more flow manipulation gaskets having configurable areas that can be configured to selectively manipulate fluid flowing therethrough in a desired manner.
Owner:ASCO LP

Avalanche detector and preparation method thereof

The invention relates to the technical field of avalanche detectors, particularly provides an avalanche detector and a preparation method, and aims to solve the problem that small-size pixels are difficult to obtain in the preparation process of an existing avalanche detector. In order to achieve the purpose, the preparation method of the avalanche detector comprises the steps that a groove is formed in an epitaxial layer through a shallow groove isolation technology, the side, away from a substrate, of the epitaxial layer is isolated into islands arranged in an array mode, and then doping is conducted on the bottom and the side wall of the groove to form a protection ring surrounding the islands; and finally, forming a gain layer and a contact layer in the island to form a pixel. Good isolation between pixels can be obtained by adopting a shallow trench isolation technology, so that the avalanche detector with small size and large array pixels is obtained.
Owner:BEIJING YANDONG MICROELECTRONICS

Target object angle estimation method for performing high angle analysis by using large array antenna

The invention provides a target object angle estimation method using a large-scale array antenna to carry out high angle analysis, which receives an input signal matrix through the array antenna, the input signal matrix is an emission signal or a reflection signal of at least one target object, and the method comprises the following steps: S1, inputting the input signal matrix to a first operation model, obtaining the number of target objects and roughly estimated target angles corresponding to the positions of the target objects; s2, inputting the number of the target objects and the input signal matrix into a second operation model for singular value decomposition, and obtaining a noise matrix; s3, obtaining an iteration angle range through the roughly estimated target angle obtained in the step S1; and S4, inputting the complex tracking matrix and the noise matrix corresponding to the iteration angle range into a third operation model, and performing iteration of the angle range, thereby obtaining a precise target angle.
Owner:CUBTEK INC +1

Patterning device

A miniaturized, automated method for controlled printing of large arrays of nano- to femtoliter droplets by actively transporting mother droplets over hydrophilic-in-hydrophobic (“HIH”) micropatches. The technology uses single or double-plate devices where mother droplets can be actuated and HIH micropatches on one or both plates of the device where the droplets are printed. Due to the selective wettability of the hydrophilic micropatches in a hydrophobic matrix, large nano- to femtoliter droplet arrays are created when mother droplets are transported over the arrays. The parent droplets are moved by various droplet actuation principles. Also, a method using two plates placed one top another while being separated by a spacer. One plate is dedicated to confirming and guiding parent droplets by using hydrophilic patches in a hydrophobic matrix, while the other plate contains HIH arrays for printing of the droplets. When the parent droplet guidance plate is rotated over the plate dedicated to printing of nano- to femtoliter droplets, the droplets are dispensed inside the HIH array utilizing their selective wettability. The methods allow the parent droplets to move over the HIH arrays many times, providing advantages for performing bio-assays or miniaturized materials synthesis in nano- to femtoliter sized droplets. With controlled evaporation of the dispensed droplets of solution, large arrays of printed material can be generated in seconds. The methods provide a nano- to femtoliter droplet printing technique for a wide variety of applications, e.g., protein- or cell-based bio-assays or printing of crystalline structures, suspensions of nanoparticles or microelectronic components.
Owner:KATHOLIEKE UNIV LEUVEN

A level shift structure for a super large array ultra-low temperature infrared image sensor

This invention discloses a level shifting structure for an ultra-large area array ultra-low temperature infrared image sensor, comprising a conversion signal input transistor; a level clamping transistor whose gate receives a level VREF, and whose source is connected to the source of a feedback transistor, the gate of an inverting N-transistor, and the gate of an inverting P-transistor; the drain of the level clamping transistor connected to the source of the conversion signal input transistor; the drain of the conversion signal input transistor grounded; the gate of the conversion signal input transistor connected to IP; the drain of the feedback transistor connected to the source of a pull-up transistor, whose gate is connected to IP, and whose drain is connected to power supply VDD; the source of the inverting P-transistor connected to power supply VDD, whose drain is connected to the source of the inverting N-transistor, and whose drain is grounded; and a level VREF generated by a level VREF clamping matching voltage generation circuit. This ensures that the source-drain voltage of the conversion signal input transistor (low threshold transistor) does not exceed 1.2V, ensuring that the device operates within its normal voltage range and avoiding the risk of breakdown.
Owner:XIAN MICROELECTRONICS TECH INST

MIMO frequency-modulated continuous-wave millimeter wave radar array reconfigurable array pattern sharing method

A method for sharing reconfigurable array modes in a MIMO frequency-modulated millimeter-wave radar array is proposed. Based on the echo signal data matrices obtained after analog-to-digital conversion of different modes, range-dimensional Fast Fourier Transform (FFT) and velocity-dimensional FFT are performed on them respectively to obtain the range-Doppler spectrum of different transmit / receive antenna combinations. Different modes with the same gain in the MIMO radar system are combined. Among the combinations with the same gain, the mode corresponding to the largest virtual array aperture in the horizontal and elevation directions under that gain is selected. The angles of these two modes are resolved and matched separately, and then combined to achieve the maximum virtual array aperture resolution. Digital beamforming is used to match the angle information obtained under the maximum aperture virtual array in the horizontal and elevation dimensions. This invention can effectively increase the maximum array aperture in the original modes with the same gain by utilizing the complementary effect between different reconfigurable array modes while using virtual array reconfigurable technology or MIMO technology.
Owner:SJTU-PINGHU INSTITUTE OF INTELLIGENT OPTOELECTRONICS