Communication conversion bridge equipment for ahb bus to crossbar bus

Abstract

The invention relates to communication conversion bridge equipment between an AHB bus and a Crossbar bus. The communication conversion bridge equipment between the AHB bus and the Crossbar bus comprises a device body, wherein the AHB bus is mounted in the device body and is connected with a function control device; the function control device is connected with each of a read data FIFO device, an address FIFO device, a control FIFO device, an address generating device, a data selector and a two-input OR gate device, wherein the read data FIFO device is used for storing the data which is read from a slave, and the address FIFO device is used for storing the host address. According to the communication conversion bridge equipment between the AHB bus and the Crossbar bus, the valid conversion bridge structure is formed through matching the AHB bus with the functional FIFO devices, and accordingly the reading / writing operation of the slave in the Crossbar bus is initiated by the host in the AHB bus, and the data is communicated between the AHB bus and the Crossbar bus without error based on satisfying the timing sequence rules of the buses.

Description

technical field [0001] The invention relates to a communication conversion bridge device, in particular to a communication conversion bridge device used for AHB bus to Crossbar bus. Background technique [0002] The AHB (Advanced High-performance Bus) bus specification is part of the AMBA bus specification. The AMBA bus specification is a bus specification proposed by ARM. Since the AMBA specification is open to the outside world, designers can develop their own AMBA interfaces for free by using the license terms, making the AMBA on-chip bus technology widely used. [0003] The AHB bus specification is used as the internal high-speed bus of the SoC design to mount high-speed devices. AHB bus system consists of master device, slave device and basic device. The basic equipment consists of an arbiter, a data multiplexer, an address control multiplexer and a decoder. The master device that needs to occupy the bus submits a request to the arbiter to occupy the bus, and the ar...

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Problems solved by technology

However, in order to avoid excessive decision delay, the arbiter may also interrupt the burst transmission

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