Programmable signal processing unit

Abstract

The invention provides a programmable signal processing unit based on a function generating unit. According to the programmable signal processing unit, the function generating unit which has an logical operation function and a data storage function is adopted and is connected with a flexible multiplexer in a matched mode, as a result, the programmable signal processing unit can be used for storing configuration data to achieve independent self-adaptive logic operation and storing user data to achieve reading / writing operation of a fine-grained data memory on one hand and can achieve mixed operation of the self-adaptive logic operation and the reading / writing operation of the fine-grained data memory on the other hand, and therefore the resource use efficiency of a programmable chip is greatly improved.

Description

technical field [0001] The invention relates to the design of a programmable signal processing unit of a field programmable gate array (FPGA) in a digital integrated circuit, in particular to a programmable signal processing unit with a mixed mode of self-adaptive logic operation and data storage. Background technique [0002] FPGA is a general-purpose logic circuit with the advantages of high flexibility and low development risk. It has been widely used in industrial control, aerospace, communication, automotive electronics and other fields, and occupies more and more market share. As a programmable device, current mainstream FPGA products use SRAM to program user designs. The programmable resources in the FPGA include: programmable logic blocks (Configurable Logic Block, CLB), programmable interconnection resources, programmable input and output modules, embedded IP, etc. Among them, CLB is the core of FPGA, and each CLB is composed of multiple programmable signal process...

AI Technical Summary

Problems solved by technology

[0005] The existing programmable signal processing unit structure can only realize logic operation or fine-grained memory function, but cannot realize adaptive logic operation and data storage function in one programmable signal processing unit at the same time, which is less flexible. Difference

In addition, the existing programmable signal processing unit structure lacks the necessary clock compensation mechanism. When the user circuit does not meet the timing constraints, it is necessary to re-modify the layout and wiring, or modify the user design, which is costly

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