Programmable function generation unit with logic operation and data storage functions

A function generation unit, data storage technology, applied in the direction of logic circuits using basic logic circuit components, logic circuits using specific components, etc. problems, to achieve good scalability, regular structure, and reduce additional design overhead.

Active Publication Date: 2016-09-21
INST OF ELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Some of the function generation units used in existing chips are based on the Look Up Table (LUT) structure, which can only realize logical operation functions but not fine-grained storage functions; some require the cooperation of several function generation units, and then use some additional The circuit can realize the fine-grained storage function, the logic resource utilization rate is low, and the configuration is not flexible enough; some need to use the data decoding module as the control module, and the circuit structure is more complicated

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  • Programmable function generation unit with logic operation and data storage functions
  • Programmable function generation unit with logic operation and data storage functions
  • Programmable function generation unit with logic operation and data storage functions

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Embodiment Construction

[0016] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0017] The invention proposes a function generation unit in the basic logic unit of the field programmable gate array, which includes: a write operation control module, a memory cell (MC) array and a read operation control module.

[0018] figure 1 A block diagram of the memory cell (MC) in the present invention is shown. MC array includes multiple MCs, such as figure 1 As shown, each MC includes: 4 NMOS transistors and two inverters. Among them, the four NMOS transistors are M1, M2, M3 and M4, and the two inverters are INV1 and INV2. Configure the address input port CADDR to connect the gates of NMOS transistors M1 and M3, connect the user address input port ADDR to the gates of NMOS transistors M2 and M4, and configu...

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Abstract

The invention discloses a k-input programmable function generating unit in an FPGA circuit. The function generating unit is composed of a write operation control module, an MC array, and a read operation control module. Among them, the write operation control module implements functions such as address decoding, write enable, and clock synchronization during fine-grained RAM write operations. The MC array adopts an MC structure capable of storing data from different sources. When the function generation unit implements user logic operation functions or fine-grained ROM functions, the stored data in the MC comes from the FPGA configuration controller; When the granular RAM function is used, the stored data in the MC comes from the user circuit. The read operation control module realizes the read operation of the data stored in the MC array during the read operation of the fine-grained RAM or ROM, and cooperates with the MC array to realize the function of the look-up table (LUT) during the user logic operation.

Description

technical field [0001] The invention relates to the technical field of field programmable gate array (FPGA) design in digital integrated circuits, in particular to a programmable function generation unit with logic operation and data storage functions. Background technique [0002] FPGA is a general-purpose logic circuit with the advantages of high flexibility and low development risk. It has been widely used in industrial control, aerospace, communication, automotive electronics and other fields, and occupies more and more market share. Current mainstream FPGA products use SRAM to program user designs. The most basic unit in FPGA is Basic Logic Element (BLE), which can independently complete certain combination and sequential logic functions, and provide the most basic logic operation and data storage functions for digital system design. BLE usually consists of function generating units, registers, and other logic circuits. The function generation unit is the core unit in...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/177
Inventor 杨海钢李威高丽江
Owner INST OF ELECTRONICS CHINESE ACAD OF SCI
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