Remote update system and method for programmable logic device

A technology of programming logic and updating method, applied in program control devices, program loading/starting, etc., can solve the problems that the staff is not suitable for programming logic, and the programming and loading method cannot meet the requirements, so as to save design costs and reduce design costs. Complexity, the effect of reducing the workload of the design

CN105224345AActive Publication Date: 2016-01-06ZHUZHOU NAT ENG RES CENT OF CONVERTERS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2016-01-06

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Abstract

The invention discloses a remote update system and method for a programmable logic device. The system comprises a computer, a processor, a programmable logic device and a configuration unit, wherein the processor, the programmable logic device and the configuration unit are mutually connected; the computer sends configuration file data to the processor; and the processor simulates the programmable logic device to configure the time sequence and the behavior of a JTAG (Joint Test Action Group) port of the configuration unit through a GPIO (General Purpose Input / Output) port according to the configuration file data so as to realize an ISP (In System Programming) operation that the processor configures the configuration unit. The technical problem that a traditional dedicated simulator programming loading way cannot meet requirements since on-site logic programming is not suitable for workers under complex application conditions, especially under the environment with high confidentiality requirements, can be solved.
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Description

technical field

[0001] The invention relates to the technical field of electronic circuits, in particular to a remote update system and method applied to programmable logic devices. Background technique

[0002] Programmable logic device FPGA is a logic circuit device, which is characterized by static reprogrammable or online dynamic reconfiguration characteristics. The hardware functions of this circuit can be modified by programming like software, which makes circuit design and product upgrades very convenient, and greatly improves the flexibility and general capabilities of the electronic system. At present, there are many chip suppliers, such as XILINX or ALTERA, which can provide various types of FPGA or CPLD.

[0003] Programmable logic devices are used more and more widely in embedded systems. In the design stage and various stages after field operation, problems such as design upgrades, modifications, and tests may be encountered. Logic devices with In-System Prog...

Examples

specific Embodiment

[0080] The specific embodiment application JTAG state machine realizes the GPIO port of DSP to the simulation of JTAG port, as attached Image 6 As shown, the following briefly introduces each state and jump condition of the JTAG state machine as follows:

[0081] (1) Test-Logic-Reset test logic reset state

[0082] In this state, the test logic is disabled to allow normal operation of the chip, reading the IDCODE register will disable the test logic. Regardless of the state of the TAP controller, as long as the TMS signal is kept high at the rising edge of 5 consecutive TCK signals, the TAP will enter the Test-Logic-Reset state. If the TMS signal is always high, then the TAP It will remain in the Test-Logic-Reset state, and the TRST signal can also force the TAP to enter the Test-Logic-Reset state. For a TAP in the Test-Logic-Reset state, if the TMS signal is at low level on the next rising edge of TCK, then the TAP will be switched to the Run-Test-Idle state.

[0083] (2)...