53 results about "In-system programming" patented technology

Methods and apparatus for efficiently enabling firmware associated with a flash memory card to be updated are disclosed. According to one aspect of the present invention, a method for updating firmware associated with a memory storage device includes providing new firmware to a host and sending the new firmware from the host to a reader which communicates with the host. The reader interfaces with the memory storage device which includes installed firmware. The method also includes sending the new firmware from the reader to the memory storage device, and incorporating the new firmware into the memory storage device such that the new firmware at least partially replaces the installed firmware. In one embodiment, the method further includes embedding the new firmware into a first command. In such an embodiment, sending the new firmware from the host to the reader includes sending the first command from the host to the reader.

A first programmable device comprises non-dedicated, programmable resources including programmable logic; dedicated circuitry; a Joint Test Action Group (JTAG) interface adapted to selectively interchange signals with the programmable logic via the dedicated circuitry; and a Serial Peripheral Interface (SPI) interface adapted to (1) selectively interchange signals with the programmable logic via the dedicated circuitry and (2) selectively interchange signals with the JTAG interface via the dedicated circuitry. The JTAG interface is adapted to be connected to a first external device. The SPI interface is adapted to be connected to a second external device. The first programmable device is adapted to transfer signals from the first external device to the second external device via the JTAG interface, the dedicated circuitry, and the SPI interface without relying on any of the programmable resources.

This invention relates to an advanced system and method of reprogrammable boot codes and In Application Programming (IAP) of embedded systems by booting up with boot loader to shadow program codes on to an internal high speed SRAM and extending contiguously to external higher space memory for runtime applications, and supporting on-line IAP to update run-time firmware or boot loader driver through network communication by utilizing advanced address remapping scheme as well as supporting In System Programming (ISP) to program initial Flash memory via ISP adaptor.

A hand-held battery-operated device for interrogating and / or programming ISO7816 smart cards by means of an ISO7816 compliant card slot, in conjunction with a display, a keypad and barcode reader for data entry, a battery backup RAM for temporary storage of collected data, flash memory for storage of proprietary information provided by a smart card issuer, a RS232 port and RF link for communication with a host computer, in-system programming port for updating the flash program, all connected operatively to an internal microprocessor which perform clock or power glitching to access internal information of a smart card to determine whether the card has been tampered, compromised, and functionality.

A system, such as a complex computer system, incorporates several programmable logic devices coupled to load their configuration code from associated EEPROMs; typically this load is automatic on powerup. The EEPROMs connect to one of several serial busses, typically JTAG busses, connecting the EEPROMs with a common configuration logic. A processor is configured to write programmable logic configuration code from its memory through the common configuration logic and over the serial busses into the EEPROMs. The processor is also capable of connecting to a network and fetching configuration code for writing to the EEPROMs.

Methods and apparatus for efficiently enabling firmware associated with a flash memory card to be updated are disclosed. According to one aspect of the present invention, a method for updating firmware associated with a memory storage device includes providing new firmware to a host and sending the new firmware from the host to a reader which communicates with the host. The reader interfaces with the memory storage device which includes installed firmware. The method also includes sending the new firmware from the reader to the memory storage device, and incorporating the new firmware into the memory storage device such that the new firmware at least partially replaces the installed firmware. In one embodiment, the method further includes embedding the new firmware into a first command. In such an embodiment, sending the new firmware from the host to the reader includes sending the first command from the host to the reader.

The invention discloses a remote update system and method for a programmable logic device. The system comprises a computer, a processor, a programmable logic device and a configuration unit, wherein the processor, the programmable logic device and the configuration unit are mutually connected; the computer sends configuration file data to the processor; and the processor simulates the programmable logic device to configure the time sequence and the behavior of a JTAG (Joint Test Action Group) port of the configuration unit through a GPIO (General Purpose Input / Output) port according to the configuration file data so as to realize an ISP (In System Programming) operation that the processor configures the configuration unit. The technical problem that a traditional dedicated simulator programming loading way cannot meet requirements since on-site logic programming is not suitable for workers under complex application conditions, especially under the environment with high confidentiality requirements, can be solved.

A method and apparatus for In-System Programming which overcomes the above-described disadvantages. The method and apparatus of the ISP system interfaces with the two oscillator (instead of I / O) pins on the microcontroller. By interfacing with the two oscillator pins, the need for extra isolation circuitry to isolate other circuits from the ISP circuits is avoided in most circumstances, without incurring the expense of an expensive JTAG tester or extra dedicated pins. The amount of isolation circuitry necessary is reduced because the two oscillator pins are usually connected to passive components (registers, capacitors, or crystals) which cannot be damaged by the relatively high programming voltages and which do not produce signals that would interfere with the ISP programming signals.

An apparatus and a system having in-system-programming function are disclosed. The apparatus comprises a non-volatile memory, a controller and a serial interface unit. When the non-volatile memory is to be programmed, the controller will actively catch the program data from an external device via the serial interface unit and save the program data in non-volatile memory. Thus, the programming efficiency is enhanced, an additional programmer is unnecessary, and the production cost can be saved.

A data storage system comprises a host and a flash memory device having a non-non-volatile memory. A controller of the flash memory device calculates an average erase count of the flash memory to obtaining a remaining period of time indicating usable lifespan of the flash memory device. The host obtains an index by comparing the average erase count with a first threshold and determines a performance capability status for the flash memory device. The performance capability status is set to a first status when the average erase count exceeds the first threshold. The host generates an indication based on the performance capability status and performs a limp function responsive to the first status. The limp function loads a predetermined in-system programming code for replacing an original one to configure a minimum number of at least some spare blocks of the flash memory reserved and used for data update operations.

The invention provides a method for dynamically configuring FPGA (field programmable gate arrays) on the basis of file compression and non-contact modes. By the aid of the method, the technical problems of high hardware complexity, low configuration speeds and poor flexibility of existing dynamic configuration can be solved. The method includes implementation steps of constructing the target FPGA; carrying out lossless compression on configuration files of the target FPGA by the aid of external processing equipment; transmitting compressed configuration files to the target FPGA in wireless modes; storing the received compressed configuration files in internal RAM (random access memories) by the aid of wireless receiving modules; reading the compressed configuration files from the RAM by the aid of data decompression modules, decompressing the compressed configuration files and then writing the configuration files into configuration FLASH; transmitting configuration file loading commands and hot start addresses by the aid of the external processing equipment; starting to load the configuration files from the hot start addresses of the configuration FLASH by the aid of configuration file loading modules so as to completely dynamically configure the FPGA. Programs of the wireless receiving modules, the data decompression modules, in-system programming modules and the configuration file loading modules are solidified inside the target FPGA.

The invention provides an installment used to carry on the in-system programming for the programmable logical component, the equipment includes: a document format converter used to convert the serial vector format file of the goal programmable logic component to an embedded programming format file as the in-system programming file of the goal programmable logic component; and a file interpreter used to analyze the input embedded programming format file to produce programming information conforming to the IEEE1149.1, and a JTAG connection signal is driven according to the programming information to carry on the in-system programming of the goal programmable logic component. In addition, the invention also provides a method used to carry on the in-system programming for the programmable logical component. The following effects are achieved through the technical program of the invention: while retaining the superiority suitable for nearly all the present programmable logical component manufacturer component, solving the problems that the memory resources consumption is big, the error detection ability is weak, and each stage in the whole in-system programming process cannot be displayed and distinguished.

The invention discloses an in-system programming universal PFC (Power Factor Correction) multifunctional processor. The multifunctional processor comprises full-wave rectification circuit, a DC / DC converting circuit and a PFC processor, and is characterized in that the full-wave rectification circuit converts AC commercial power into DC, the DC is output by a DC / DC converter, and the DC / DC converter is controlled by the PFC processor. The in-system programming universal PFC multifunctional processor has a simple and convenient processing procedure, and does not need frequent modification of hardware circuits; the various main-control MCU chips are adopted, the secondary development technology is easy to master, and the extensible functions are rich, so that EMI (Electromagnetic Interference) in the circuit can be effectively reduced.

An electric wheelchair controller belongs to the field of equipment for the elderly and the disabled, and includes a potentiometer type two dimensional rocking bar, an analog / digital conversion circuit, a circuit with four functional keys, a two nixie tube display circuit, a storage battery voltage detection circuit, a single chip and a minimum system circuit. The single chip serves as a core component of the controller. An analog signal which is output from the two dimensional rocking bar are converted into a digital signal through the analog / digital conversion circuit, and then the digital signal is processed and determined by the single chip so as to control an advance direction and speed of the electric wheelchair; the four keys have the following functions of increasing and decreasing of the speed of the electric wheelchair, sound alarming and on and off of the power source; the two nixie tube is respectively used for displaying the speed of the electric wheelchair and power of the storage battery; and the single chip is provided with an in-system programming (ISP) online download interface which is used for downloading control programs. According to the electric wheelchair controller, the operation is flexible and portable, the cost is low, and the ISP function provided by the controller can meet the requirement of personalized operating habits of drivers.

This invention relates to an advanced system and method of reprogrammable boot codes and In Application Programming (IAP) of embedded systems by booting up with boot loader to shadow program codes on to an internal high speed SRAM and extending contiguously to external higher space memory for runtime applications, and supporting on-line IAP to update run-time firmware or boot loader driver through network communication by utilizing advanced address remapping scheme as well as supporting In System Programming (ISP) to program initial Flash memory via ISP adaptor.

A manufacturing test and programming system (100) is presented including providing a PCB tester (108), providing an in-system programmer (102) electrically attached to the PCB tester (108), mounting a device under test (114) having a programmable device (116) attached thereon and programming the programmable device (116) with the in-system programmer (102).

An in-system programming system and method is provided, which is applicable for chip programming of a computer motherboard. Firstly, a programming interface is configured in the computer motherboard, in which one end of the programming interface is connected to an on-board programmer, and the other end is connected to a plurality of chips to be programmed, thereby achieving the communication between the on-board programmer and the chips. Next, a motherboard connector and the programming interface are connected, and the motherboard connector and the on-board programmer are communicated through a communication interface of the on-board programmer. Then, the other end of the motherboard connector is connected to a programmable master-control program. Then, when the programmable master-control program is used for programming, programming contents of the programmable master-control program are transmitted to the on-board programmer through the communication between the motherboard connector and the on-board programmer, so as to program the chip.

IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

The invention belongs to the technologies of electronics, and specifically relates to an in-system programming enabled general-purpose flight parameter collector. Existing products in the field of flight parameters are different in model but roughly the same in function for the purpose of ensuring the uniformity and certainty of technical conditions, and this may thus be unfavorable for mass production and cause troubles for a user during aircraft routine maintenance and troubleshooting. The in-system programming enabled general-purpose flight parameter collector in the invention comprises a host computer module, a power module, a signal conditioning module, and an assembly of signal interface modules for various aircraft types. A ground maintenance device loads onboard configuration related information to a storage area within the flight parameter collector by way of in-system programming to meet the demands of use of different types of aircrafts. A general-purpose design can allow reduction of product categories, effective control of technical conditions, mass production, and also improve the convenience in aircraft routine maintenance and reduce the cost and difficulty of service assurance.

A language extension that advances safety in system programming in that an entire type may be declared to be immutable in the case in which all instances of that type are immutable. The immutable type declaration automatically causes any instances of that type to be treated as immutable, and automatically causes all directly or indirectly reachable members (e.g., fields, methods, properties) of the instance to also be treated as immutable. Furthermore, any construction time reference that allows for field assignment of the instance is not permitted to survive beyond the point at which the instance becomes accessible to its creator. Accordingly, this instance, and any other instance of that same type, will be immutable from the very time of construction. The ability to classify all such instances as immutable is beneficial as the immutable characteristic permits actions that normally would not be allowed due to resource access safety.

A manufacturing test and programming system (100) is presented including providing a PCB tester (108), providing an in-system programmer (102) electrically attached to the PCB tester (108), mounting a device under test (114) having a programmable device (116) attached thereon and programming the programmable device (116) with the in-system programmer (102).

The invention discloses a method for reading and writing on-line serial data of an on-chip system, and belongs to the technical field of integrated circuits. The method comprises the following steps of: generating an ISP (in-system programming) module by using a comprehensive hardware description language, and inserting the ISP module into the on-chip system with a program memory to implement read-write of the on-line serial data of the program memory. The ISP module comprises a controller module, a status register module, an SPI (serial peripheral interface) module, a data path module, a timer module, an address generator module and a control signal generator module. The controller module is connected with the SPI module, the status register module, the data path module, the timer module, the address generator module and the control signal generator module; the timer module is connected with the control signal generator module; and the control signal generator module is connected with the address generator module. The module in the method is clear to divide, simple to implement and high in reliability, is easily transplanted in different on-chip systems, is convenient to develop and debug the on-chip system, and shortens the development period of the on-chip system.

A system with Universal Serial Bus (USB) host functions and its processing method is proposed. This system comprises a printed circuit board, a USB host connected to the printed circuit board, an in-system programming interface device connected to the printed circuit board, a plurality of device ports connected to the printed circuit board, at least one USB host port connected to the printed circuit board, and at least one memory device connected to the printed circuit board, wherein the printed circuit board is used to connect the USB host, the in-system programming interface device, the device ports, the USB host port, and the memory device.

Methods and device for in-system firmware update in an information output device are provided. In one aspect, a method of firmware update in a display device receives a set of data in an image format through a video signal input channel of an input port of the display device. The set of data is converted from the image format to an instruction set format that is different from the image format. A first set of instructions that is used to operate the display device is updated with the set of data in the instruction set format.

A language extension that advances safety in system programming in that an entire type may be declared to be immutable in the case in which all instances of that type are immutable. The immutable type declaration automatically causes any instances of that type to be treated as immutable, and automatically causes all directly or indirectly reachable members (e.g., fields, methods, properties) of the instance to also be treated as immutable. Furthermore, any construction time reference that allows for field assignment of the instance is not permitted to survive beyond the point at which the instance becomes accessible to its creator. Accordingly, this instance, and any other instance of that same type, will be immutable from the very time of construction. The ability to classify all such instances as immutable is beneficial as the immutable characteristic permits actions that normally would not be allowed due to resource access safety.

A data storage system comprises a host and a flash memory device having a non-non-volatile memory. A controller of the flash memory device calculates an average erase count of the flash memory to obtaining a remaining period of time indicating usable lifespan of the flash memory device. The host obtains an index by comparing the average erase count with a first threshold and determines a performance capability status for the flash memory device. The performance capability status is set to a first status when the average erase count exceeds the first threshold. The host generates an indication based on the performance capability status and performs a limp function responsive to the first status. The limp function loads a predetermined in-system programming code for replacing an original one to configure a minimum number of at least some spare blocks of the flash memory reserved and used for data update operations.

A biosensing device includes: a routing matrix, electrically connected to a testing strip; a sensors and actuators group, electrically connected to the routing matrix; a processing module, electrically connected to the routing matrix, and an in-system programming interface. The processing module includes a processing unit and a storage device storing application software. The in-system programming interface is electrically connected to the processing module, for connecting to an external in-system programmer and utilizing the in-system programmer to update the application software; wherein the processing unit executes the application software, updated through in-system programming interface, to control the sensors and actuators group for measuring the testing strip to generate a biosensing result.

It is proposed an in-system programming process, by programming equipment of at least one non-volatile storage memory of a communication device. The process includes the following steps: transmission, by the programming equipment to the communication device, of at least one extension file; transmission, by at least one of the extension files, called an enlightening extension file, of at least one first item of configuration information for the communication device; selection, by the programming equipment depending on the first item(s) of configuration information for the communication device of at least one data file associated to an internal application of the communication device; and transmission, by the programming equipment to the storage memory, of the selected data file(s).

The invention discloses a method and apparatus for carrying out recovery management. The method comprises the following steps: loading a group of intra-system programming codes by using a boot loader; storing the information to be reserved including a programming loader in a recovery system in a reserved area of a random access memory, so as to be reserved during the dormancy period; judging whether to start dormancy, and generating a judgment result; controlling the memory device to start dormancy according to the judgment result; judging whether any wake-up event occurs or not after the sleep is started; executing a first intra-system programming code in the group of intra-system programming codes to start a first operation after the any wake-up event occurs; and executing the recovery intra-system programming loader to load other intra-system programming codes in the group of intra-system programming codes. The first operation is performed by executing the first in-system programming code, so that the real-time response between the main device and the memory device can be ensured to improve the overall efficiency.