7 results about "Internal RAM" patented technology

The application discloses a blowout preventer internal gate stroke position real-time monitoring and calibration method, comprising the following steps: synchronously collecting hydraulic pressure sequence, hydraulic flow sequence, valve control instruction sequence, action time sequence and acoustic emission event stream when the gate opening and closing action is triggered; performing pretreatment on the collected data; constructing pressure-flow-instruction response trajectory; extracting segmented slope feature, hysteresis shape feature, response time delay feature and inter-segment transition feature, and performing position inversion processing to obtain gate stroke position preliminary estimation sequence; identifying true-to-position endpoint moment, generating stroke zero point anchor point and stroke range endpoint anchor point; performing event parameterization processing on the pretreated acoustic emission event stream; and performing stroke calibration processing. The stroke inversion calibration method of the application utilizes multi-source standardized sequence and acoustic emission anchor point constraint, realizes gate position real-time monitoring and true-to-position determination, and has the advantages of strong anti-interference, low misjudgment rate and traceable calibration.

The invention discloses a hanging debugging method and debugging system for an embedded system, and relates to the technical field of embedded systems. According to the method, a Debugbus module and a Debugscan module are configured in an SOC chip of the embedded system, and an upper receiver is configured outside the chip; the Debugbus module is independent of a system bus and is used for collecting register information needing to be observed when the system bus is suspended; the Debugscan module is used for sending the register information collected by the Debugscan module to the upper receiver; the Debugscan module only needs to be opened and closed, and when the Debugscan module is opened, register information is obtained from the Debugbus module and transmitted to an upper receiver to be analyzed; and information is not transmitted during closing. According to the invention, the system information can be dumped when the bus is hung, so that the requirement on an internal RAM (Random Access Memory) of the embedded system is reduced, and the system cost is saved while a debugging function is provided.

The invention discloses a security-critical software spatial visualization method and system. The method comprises the steps of analyzing and compiling a mapping file to obtain information, mapping a storage area, carrying out spatial statistics and classification, and carrying out visualization and output. The system comprises an analysis module, a storage module, a statistics module and a visualization module. According to the method, high-precision spatial distribution is achieved, and overall and subdivision statistics of the Flash, the internal RAM and the external RAM are covered with the obvious space; the multi-level display can refine space occupation analysis to a three-level structure of storage area-file-segment, supports accurate positioning of an optimization target, supports mapping file formats of various compilers, and improves reliability and safety of software.

The invention discloses a real-time monitoring and calibrating method for the stroke position of a flashboard in a blowout preventer. The real-time monitoring and calibrating method comprises the following steps that when the opening and closing action of the flashboard is triggered, a hydraulic pressure sequence, a hydraulic flow sequence, a valve control instruction sequence, an action time sequence sequence and an acoustic emission event flow are synchronously collected; executing preprocessing on the collected data; constructing a pressure-flow-instruction response track; extracting segmented slope features, hysteretic morphological features, response time delay features and inter-segment transition features, and executing position inversion processing to obtain a gate stroke position preliminary estimation sequence; identifying a true in-place end point moment, and generating a stroke zero point anchor point and a stroke range end point anchor point; performing event parameterization processing on the preprocessed acoustic emission event stream; and executing travel calibration processing. According to the invention, a multi-source standardized sequence and acoustic emission anchor point constrained stroke inversion calibration method is utilized, real-time monitoring and true in-place judgment of the position of the flashboard are realized, and the method has the advantages of high interference resistance, low misjudgment rate and traceable calibration.

The invention provides a single-chip microcomputer upgrading method and device, and the method comprises the steps: controlling an external Flash memory to receive a data package sent by a sending device connected with a target single-chip microcomputer when the target single-chip microcomputer is in a bare computer working mode, and determining whether a preset application program is correct or not according to a crc value of the preset application program; if yes, writing the data packet into an external Flash memory; a program updating instruction is received, according to the program updating instruction, the BOOT package is called into an internal RAM of the target single-chip microcomputer from an external Flash memory, and a bootstrap program is run and started; and controlling the starting guide program to write the preset application program into the internal Flash memory of the target single-chip microcomputer from the external Flash memory so as to upgrade the single-chip microcomputer after the target single-chip microcomputer is reset. According to the invention, the external Flash memory detects the data packet, and after the preset application program in the external Flash memory is stored in the internal Flash memory, the correctness of the preset application program in the internal Flash memory is ensured, so that the firmware upgrading of the target single-chip microcomputer is ensured.

The invention provides a method and device for testing multi-level memory and performance of a DSP embedded system, and the method comprises the steps: setting an address region of a protected region and an address region of a security test region according to preset memory layout information in an initialization stage of the DSP embedded system; analyzing a test instruction set sent by the upper computer to obtain an internal RAM test instruction and an external communication chip RAM test instruction; responding to the internal RAM test instruction, adopting dynamic memory mapping management, identifying and avoiding a protected area necessary for program operation, and executing a memory test algorithm only in the security test area to obtain a first test result; in response to the RAM test instruction of the external communication chip, backing up data of a to-be-tested block of the external communication chip to a temporary buffer area, and testing the to-be-tested block to obtain a second test result; and returning the first test result and the second test result to the upper computer. The security and coverage rate of the system test can be improved.

The application relates to the field of chip design, in particular to a video data processing debugging system and method based on FPGA prototype verification. The system comprises a DDR memory for storing data; a data generation module for generating original video data to be tested; a compression module for compressing the original video data to be tested to generate compressed data, and for providing an internal bus interface for accessing the DDR memory; a bus interface debugging module for providing an external bus interface for accessing the DDR memory; when the compression module generates the compressed data, a bus arbitration module is enabled to connect the internal bus interface with the DDR memory to store the compressed data into the DDR memory; when it is needed to verify the video data processing function, the bus arbitration module is enabled to connect the external bus interface to enable an external device to read the compressed data from the DDR memory. The scheme of the application avoids wasting internal RAM resources and realizes convenient and fast acquisition of debugging data.