17 results about "Platform Controller Hub" patented technology

A method for managing passwords for a BIOS and a BMC is implemented by a computer including a processor, a BMC, a platform controller hub (PCH), a first non-volatile memory and a second non-volatile memory. The BMC stores a BMC password, the first non-volatile memory stores a BIOS password, and the second non-volatile memory stores a first string and a second string. The method includes steps of: upon receiving a command for changing the BIOS password, the processor changing the BIOS password via the PCH according to the command; the processor changing the second string via the PCH to be the same as the BIOS password; the processor rebooting the computer; the BMC changing the first string via the PCH to be the same as the second string; and the BMC changing the BMC password to be the same as the first string.

A programmable logic device, and a server, which relate to the technical field of chip upgrading. A stage of second multi-path selection switch MUX2 is added before a first multi-path selection switch MUX0 between a complex programmable logic device (CPLD) and a platform controller hub (PCH) flash, in order to establish a hardware path between a baseboard management controller (BMC) and the PCH flash; moreover, a stage of third multi-path selection switch MUX3 is added before a fourth multi-path selection switch MUX1 between the CPLD and a BMC flash, in order to establish a hardware path between the PCH and a BMC chip, i.e., the BMC flash. Thus, a selection signal at the second multi-path selection switch MUX2 and the third multi-path selection switch MUX3 is realized, and the selection signal can be sent to the CPLD so as to complete the switching of a selection path. Therefore, during an upgrading process for BMC / PCH FW, the security of upgrading firmware is ensured, and hardware support is also provided for simplifying the upgrading process.

A notebook computer and an operation method thereof are provided. The notebook computer includes a platform controller hub (PCH), an embedded controller (EC), a data wiring, a clock signal wiring and an interrupt signal wiring. The platform controller hub includes a first internal integrated circuit (I2C) controller and a general-purpose input / output (GPIO) controller. The embedded controller includes a second internal integrated circuit (I2C) controller. The data wiring is connected to the first I2C controller and the second I2C controller. The clock signal wiring is connected to the first I2C controller and the second I2C controller. The interrupt signal wiring is connected to the GPIO controller and the second I2C controller.

The present application relates to the technical field of hanging debugging, and discloses a debugging method, device and equipment for a hanging management engine and a storage medium, which are applied to a baseboard management controller, wherein the baseboard management controller, a complex programmable logic device and a platform path controller are communicatively connected in pairs; the method comprises the following steps: when an abnormal state of the management engine is detected, obtaining state information of the platform path controller; the abnormal state information of the abnormal state is obtained by communication between the complex programmable logic device and the platform path controller and is sent to the baseboard management controller; based on the state information, the management engine is debugged to determine the abnormal source of the management engine. In this way, when the management engine is in an abnormal state, the state information of the platform path controller is obtained to debug the management engine and determine the abnormal source of the management engine, thereby improving the timeliness and completeness of the relevant debugging information obtained when the management engine is hanging, and thus the debugging efficiency of the hanging management engine is improved.

A computer system and a processing method thereof of sound signal are provided. The computer system includes a platform path controller (PCH), a high-definition audio (HDA) codec, and a digital microphone. The HDA codec is coupled to the PCH. The digital microphone is coupled to the PCH and the HDA codec. The digital microphone is used to generate sound signal. The HDA codec processes the sound signal from the digital microphone. Accordingly, the audio recording with high quality could be provided.

A circuit board includes a platform controller hub (PCH), a peripheral component connector and a switch. The PCH includes a clock request pin and a GPIOB pin. The peripheral component connector includes a connector pin. The switch is controlled by the GPIOB pin and is coupled between a low potential and a line between the connector pin and the clock request pin and is configured to: conduct the line and the low potential based on a high potential of the GPIOB pin; and disconnect the line and the low potential based on the low potential of the GPIOB pin.

The invention provides a vehicle-mounted device which generates and outputs an enable signal when a power switch is pressed down. The first memory and the second memory respectively store startup data. The platform path controller receives the enable signal, generates a read signal according to the enable signal, and outputs the read signal to the first memory. The logic chip selectively generates and outputs a switching signal to the switching unit when the platform path controller fails to read the startup data from the first memory. When the switching unit receives the switching signal, the platform path controller is electrically coupled to the second memory. According to the vehicle-mounted device provided by the invention, the second memory can be read when the first memory cannot be read, so that the effect of damage rescue is achieved.

A motherboard includes a connector, a controller, a platform controller hub and a switch block. The connector is configured to be electrically connected to an expansion card, and includes a first pin, a second pin and a third pin. The controller includes an analog-to-digital converter coupled to the first pin. The controller identifies a digital voltage value of the first pin via the analog-to-digital converter, and generates a power supply requirement and a signal transmission requirement corresponding to the expansion card based on the digital voltage value. The switch block is coupled to the second pin, the third pin, the controller and the platform controller hub. The switch block provides a power supply voltage to the second pin based on the power supply requirement, and the switch block couples the third pin to the platform controller hub based on the signal transmission requirement.

Embodiments of the present application relate to the technical field of operating systems, and more particularly, to a dual basic input / output system (BIOS) system, a system switching method and apparatus, a device, and a non-transitory readable storage medium, which aim to improve switching efficiency of the dual BIOS system. The system includes: a first BIOS chip, configured to run a first BIOS sub-system; a second BIOS chip, configured to run a second BIOS sub-system; a baseboard management controller (BMC) chip, configured to run a BMC program; a BMC control chip, configured to control the BMC chip and the second BIOS chip, the BMC control chip being connected to the BMC chip and the second BIOS chip; and a platform controller hub, configured to control the first BIOS chip and the BMC control chip, the platform controller hub being connected to the first BIOS chip via a first bus and connected to the BMC control chip via a second bus, the first bus being connected to the second bus, and the platform controller hub being connected to a central processing unit (CPU).

A monitoring and control method includes: connecting, by a first Multiplexer (MUX), a logic element and a Baseboard Management Controller (BMC) to a BMC serial storage module storing a BMC code, and connecting, by a second MUX, the logic element and a Platform Controller Hub (PCH) to a Basic Input Output System (BIOS) serial storage module storing a BIOS code; when the logic element obtains power-on operation information, and performing a credibility detection on the BMC code and the BIOS code; if the BMC code passes the detection, controlling, by the logic element, the first MUX to connect the BMC to the BMC serial storage module; if the BIOS code passes the detection, controlling, by the logic element, the second MUX to connect the PCH to the BIOS serial storage module; and by the logic element, controlling the PCH to be powered and the BMC to enter a working state.

The utility model relates to the technical field of chip debugging, and discloses a circuit, a system and a computer for chip debugging, which comprise a switch module, a chip to be debugged, a platform path controller and a universal interface, the switch module is respectively connected with the chip to be debugged, the platform path controller and the universal interface; and the chip to be debugged is also connected with the platform path controller and the universal interface. The switch module is respectively connected with the to-be-debugged chip, the platform path controller and the universal interface, and the connection among the to-be-debugged chip, the platform path controller and the universal interface can be changed through the switch module, so that the to-be-debugged chip can be directly debugged through the universal interface under the condition that a machine is not disassembled.

An embedded device in a vehicle includes a power switch, a first memory, a second memory, a platform controller hub, a switching unit, and a logic chip. The power switch is used to generate and output an enable signal when triggered. The first memory is used to store boot data. The second memory is used to store the boot data. The platform controller hub is coupled to the power switch, and selectively coupled to the first memory and the second memory. The switching unit is coupled to the first memory, the second memory and the platform controller hub. The logic chip is coupled to the platform controller hub and the switching unit for selectively generating and outputting a switching signal to the switching unit. When the switching unit receives the switching signal, the platform controller hub is coupled to the second memory.

The embodiment of the invention discloses a device information acquisition method and device, electronic equipment and a medium. The method comprises the following steps: acquiring target protocol information of a target protocol between a target device and a platform path controller; based on a data packet format corresponding to a preset channel of a preset protocol, an information acquisition data packet for a target device is generated according to the target protocol information, and the information acquisition data packet is sent to the platform path controller based on the preset channel of the preset protocol; wherein a preset channel of the preset protocol is a protocol channel capable of carrying out transparent transmission on a command of a target protocol; and accessing the target device through the platform path controller according to the information acquisition data packet, and acquiring target information from the target device. According to the scheme, the real target information of the target device can be conveniently obtained under the condition that customized development and interface conversion do not need to be carried out on the information obtaining equipment.

The invention relates to a high-integration industrial personal computer main board with multiple expansion function interfaces, which comprises a circuit main board, a CPU (Central Processing Unit) and a PCH (Platform Controller Hub), wherein the CPU and the PCH are arranged on the circuit main board; a memory module, an ATX power supply, a battery element, a hard disk, a VGA interface, an HDMI interface, a network interface socket, an audio interface, a front audio interface, an expansion slot, an audio output interface, a bus slot, an external interface, an input and output interface, a COM6, a COM5, a COM4, a COM3, a parallel port, a first fan interface, a keyboard and mouse interface, a second fan interface, a front panel interface, a USB3 interface, an SATA interface and a USB2 interface are further arranged on the circuit mainboard. The requirements of more functional interfaces are met, so that the functions of the industrial personal computer are conveniently expanded, the high integration of the mainboard is ensured, the mainboard has the diversity of the expansion functions of the mainboard, the mainboard supports more expansion functions, and the applicability of the industrial personal computer is improved.

The present application discloses a bandwidth allocation method, module, server, electronic device, medium and product, relating to the technical field of servers, including: in response to the platform controller hub writing a strobe signal to the switch chip, controlling the output end of the switch chip to be conducted with the input end of the switch chip corresponding to the target root port of the central processing unit; wherein, the target root port of the central processing unit is the root port of the central processing unit corresponding to the strobe signal; the input end of the switch chip is connected to the bandwidth allocation signal line of the root port of the central processing unit; obtaining the output end signal of the switch chip through the input-output interface of the platform controller hub, and allocating bandwidth to the root port according to the bandwidth allocation relationship between the output end signal of the switch chip and the root port. The bandwidth allocation method provided by the present application can implement the bandwidth allocation function of the CPU PCIe port with fewer input-output interfaces.

Present disclosure generally relates to computing and wireless communications, particularly, to mobile edge computing (MEC) server and method for MEC. The MEC server includes casing. The casing includes scalable processor comprising external Platform controller Hub (PCH) is configured to perform edge computing of network data associated with telecommunication network. Further, MEC server in casing includes Board Management Controller (BMC) communicatively coupled to PCH is configured to manage functions of motherboard and manage access to remote monitoring function of MEC server. Furthermore, MEC server in casing includes ethernet controllers configured to perform fronthaul connectivity with radio unit associated with telecommunication network, or Backhaul connectivity for optical ethernet associated with telecommunication network. Further, MEC server includes passive thermal cooling unit comprising cooling blocks, fins, and heat sinks, to dissipate heat in MEC server, using passive thermal cooling technique to heat sinks.

The invention discloses a notebook computer and an operation method thereof. The notebook computer comprises a platform path controller (PCH), an embedded controller (EC), a data line, a clock signal line and an interrupt signal line. The platform path controller comprises a first internal integrated circuit controller (I2C controller) and a general purpose input / output pin controller (GPIO controller). The embedded controller comprises a second internal integrated circuit controller. The data wire is connected to the first internal integration circuit controller and the second internal integration circuit controller. The clock signal wire is connected to the first internal integration circuit controller and the second internal integration circuit controller. The interrupt signal wire is connected to the universal input / output pin controller and the second internal integrated circuit controller.