Method for dynamically configuring FPGA (field programmable gate arrays) on basis of file compression and non-contact modes

A dynamic configuration and non-contact technology, applied in the direction of program control device, program loading/starting, program control design, etc., can solve the problems of low configuration speed, poor flexibility, high hardware complexity, etc. Effects of touchability and hardware complexity reduction

Inactive Publication Date: 2017-06-13
XIDIAN UNIV
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AI Technical Summary

Problems solved by technology

[0008] The purpose of the present invention is to overcome the defective that above-mentioned prior art exists, has proposed a kind of FPGA dynamic configuration method based on file compr

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  • Method for dynamically configuring FPGA (field programmable gate arrays) on basis of file compression and non-contact modes
  • Method for dynamically configuring FPGA (field programmable gate arrays) on basis of file compression and non-contact modes
  • Method for dynamically configuring FPGA (field programmable gate arrays) on basis of file compression and non-contact modes

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Embodiment Construction

[0027] Below in conjunction with accompanying drawing and embodiment, the present invention is described in further detail;

[0028] refer to figure 1 , the present invention includes the following modules:

[0029] Module B10, external processing module;

[0030] The requirements for the external processing module in the present invention are: a computer with a wireless file sending function. In this embodiment, a notebook computer with a Bluetooth interface is used, and a Bluetooth transceiver module is hung outside the target FPGA.

[0031] Module B11, wireless transmission mode;

[0032] The wireless transmission method refers to any method that can transmit files without contact. In this embodiment, Bluetooth is used to send;

[0033] Module B12, wireless interface;

[0034] The wireless interface is used for the physical layer when receiving wireless signals, and is mainly responsible for the level conversion function between the wireless transmission and the target ...

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Abstract

The invention provides a method for dynamically configuring FPGA (field programmable gate arrays) on the basis of file compression and non-contact modes. By the aid of the method, the technical problems of high hardware complexity, low configuration speeds and poor flexibility of existing dynamic configuration can be solved. The method includes implementation steps of constructing the target FPGA; carrying out lossless compression on configuration files of the target FPGA by the aid of external processing equipment; transmitting compressed configuration files to the target FPGA in wireless modes; storing the received compressed configuration files in internal RAM (random access memories) by the aid of wireless receiving modules; reading the compressed configuration files from the RAM by the aid of data decompression modules, decompressing the compressed configuration files and then writing the configuration files into configuration FLASH; transmitting configuration file loading commands and hot start addresses by the aid of the external processing equipment; starting to load the configuration files from the hot start addresses of the configuration FLASH by the aid of configuration file loading modules so as to completely dynamically configure the FPGA. Programs of the wireless receiving modules, the data decompression modules, in-system programming modules and the configuration file loading modules are solidified inside the target FPGA.

Description

technical field [0001] The invention belongs to the field of digital signal processing, relates to an FPGA dynamic configuration method, in particular to a file compression and non-contact FPGA dynamic configuration method, which can be used in the fields of communication, image processing, energy transportation and the like. Background technique [0002] FPGA (Field Programmable Gate Array) is a field programmable gate array, which is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of original programmable device gates. [0003] FPGA is a programmable signal processing device. Users can define its functions by changing configuration information to meet design requirements. Compared with traditional digital cir...

Claims

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Application Information

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IPC IPC(8): G06F9/445
CPCG06F9/44505
Inventor 王海宫璐涯刘岩秦红波赵伟张敏
Owner XIDIAN UNIV
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