Data storage and processing methods

A technology of data storage and processing method, which is applied in the direction of electrical digital data processing, protection of storage content to prevent loss, instruments, etc., can solve the problem of losing data in flash memory, etc., and achieve the effect of easy expansion

Active Publication Date: 2018-12-18
ZHONGBEI UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide the society with this data storage and processing method, which successfully solves the problem of losing data in the flash memory when the storage circuit suddenly loses power

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0020] Embodiment 1. Data storage and processing method

[0021] This data storage and processing method of this example is to avoid losing the data in the NAND flash memory buffer RAM and the data in the FIFO buffer for writing data in the flash memory inside the FPGA and the data storage and processing method when the acquisition storage circuit suddenly loses power. The technical features are: the data storage and processing method of this example are as follows: under the control of FPGA and its system software, the ferroelectric memory synchronously circulates and stores the same data as that written in the flash memory storage channel, and the NAND flash memory is lost in its RAM when the power is off. The data written and stored by programming is not completed, and at the same time, part of the collected data cached in the FIFO is lost inside the FPGA, and these lost data are completely saved in the ferroelectric memory. After reading the data stored in each memory, the ...

Embodiment 2

[0022] Embodiment 2. Data storage and processing method

[0023] The data storage and processing method of this example adopts data storage and processing circuit to complete or realize, and the data storage and processing circuit structure of this example consists of figure 1 Shows that a part of the software program of the data storage and processing circuit is represented by Figure 2 ~ Figure 4 show. The difference between the data storage and processing method of this example and the data storage and processing method of embodiment one has: 1. some slices of this example are n NAND flash memories, and n is selected as 5, or 6, or 7, or 8 natural integer. 2. The ferroelectric memory cycle storage address unit a of this example is selected as a natural integer of 3 or 4. 3. In this example, x is the number of address units a-x that are cyclically stored in the ferroelectric memory each time the ferroelectric memory is not full, and a≥x. 4. In this example, c is the numb...

Embodiment 3

[0024] Embodiment 3. Data storage and processing method

[0025] The data storage and processing method of this example is completed or realized by using a data storage and processing circuit, and the data storage and processing circuit structure of this example is used figure 1 Shows that a part of the software program of the data storage and processing circuit is represented by Figure 2 ~ Figure 4 show. The difference between the data storage and processing method of this example and the data storage and processing method of embodiment one and embodiment two has: 1. some slices of this example are n NAND flash memories, and n is selected as 9, or 10, or 11 , or a natural integer of 12. 2. The choice of a in this example is a natural integer of 5 or 6. 3. In this example, x is the number of address units a-x that are cyclically stored in the ferroelectric memory each time the ferroelectric memory is not full, and a≥x. 4. In this example, c is the number of times the ferr...

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Abstract

The invention discloses a data storage and processing method and belongs to the technical field of storage testing under the bad condition. The method can avoid the situation that when an acquisition and storage circuit suddenly loses power, written and stored data not subjected to complete programming in a buffer RAM of an NAND flash and data in an FIFO buffer are lost; acquired data is synchronously and cyclically stored by utilizing a ferroelectric memory, so that the lost data is completely stored during power failure; the data in the ferroelectric memory is fused to the data recorded in the flash through processing, thereby complementing the data lost during power failure; and the data continues to be stored in the NAND flash by switching on again after multi-time power failure before the NAND flash is full of the data, and the data acquired before each power failure is complemented. The method has the advantages that the problem in complete recording of the acquired data during sudden power failure is solved; the method has a function of restarting for continuous storage after multi-time sudden power failure; the expansion can be conveniently carried out based on an original storage circuit; and the data storage and processing method is worthy of adoption and popularization.

Description

technical field [0001] The data storage and processing method disclosed by the present invention belongs to the technical field of storage testing, and specifically relates to a FIFO cache that can avoid losing data in NAND flash memory buffer RAM and FPGA for flash memory write data when the acquisition storage circuit suddenly loses power The data storage and processing method of the data in the device is suitable for the recorder using NAND memory as the main storage medium, and it is urgently needed for the instruments and occasions that require complete recording of input data after a sudden power failure. Background technique [0002] With the rapid development of solid-state recorders, they have been used in various fields such as aerospace, military industry, and civil use. Especially in aerospace and military fields, the role of recorders is particularly important. NAND flash memory has the characteristics of high storage density and fast read and write speed, but c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/16G06F13/16
CPCG06F12/16G06F13/1668
Inventor 丁永红尤文斌马铁华裴东兴范锦彪李新娥张红艳沈大伟张晋业刘明军
Owner ZHONGBEI UNIV
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