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Register address space control method and controller, and system on chip

An address space and control method technology, applied in the field of integrated circuits and information security, can solve the problems of non-continuous address space and unfriendly interface of the address area control register.

Active Publication Date: 2017-01-11
MORNINGCORE TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] 2. The interface provided to software developers is not friendly, because there are usually multiple buses connected to different components in a SoC, and the address area control register address space in each bus is not continuous

Method used

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  • Register address space control method and controller, and system on chip
  • Register address space control method and controller, and system on chip
  • Register address space control method and controller, and system on chip

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Embodiment Construction

[0020] In order to make the object, technical solution and advantages of the present invention clearer, various embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. However, those of ordinary skill in the art can understand that, in each implementation manner of the present invention, many technical details are provided for readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following implementation modes, the technical solution claimed in each claim of the present application can be realized.

[0021] First of all, it is worth noting that the main device in this application document may be a central processing unit CPU, a graphics processing unit GPU and other hardware components capable of direct memory access (DMA).

[0022] The first embodiment of the present invention relates to a method for controlling a regis...

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PUM

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Abstract

The invention relates to a register address space control method and controller, and a system on a chip. The method comprises the steps of presetting at least one configuration item for each hardware resource on a bus, wherein each configuration item is used for appointing a register address space, and indicating whether the register address space is under read protection or write protection; and judging whether to allow access of a master device or not according to whether the register address space is under read protection or write protection indicated by an ith configuration item if a register address accessed by the master device in a non-safe world is in the address space appointed by the set ith configuration item, wherein i is greater than or equal to 0 and is less than or equal to the number of the set configuration items. A software developer can flexibly appoint any register address space to be protected only by setting the controller without caring about the bus connection condition in the SoC and an address area control register in the bus.

Description

technical field [0001] The invention relates to the field of integrated circuits and information security, in particular to a control method of a register address space, a controller and an on-chip system. Background technique [0002] The SoC (system on chip) using ARM TrustZone technology connects all hardware resources and the master device that accesses these hardware resources (including the central processing unit CPU, graphics processing unit GPU and other hardware components that can perform direct memory access (DMA)) Divided into two worlds --- safe world and non-safe world (also called normal world). Wherein, the hardware resources refer to the accessed storage devices in the components on the bus, including RAM and registers. The resources in the secure world are protected and can only be accessed by the master in the secure world, but not by the master in the non-secure world. From the perspective of flexibility, only a small amount of hardware resources and t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02G06F12/14
Inventor 黄庆伟王宏刚
Owner MORNINGCORE TECH CO LTD
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