Alignment method and system of multiple paths of parallel data signals

A technology for data signals and digital signals, which is applied in the field of alignment methods and systems for multi-channel parallel data signals, can solve problems such as unstable internal structure, data demodulation errors at the receiving end, and difficulty in data synchronization, and is suitable for promotion and avoidance. Effects of demodulation errors

Active Publication Date: 2017-05-31
WUHAN POST & TELECOMM RES INST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, when going from ADC to FPGA or ASIC, it may be difficult to synchronize the data of each channel due to circuit wiring delay or the internal structure of the high-speed tra

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  • Alignment method and system of multiple paths of parallel data signals
  • Alignment method and system of multiple paths of parallel data signals
  • Alignment method and system of multiple paths of parallel data signals

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Embodiment Construction

[0020] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

[0021] see figure 1 As shown, the method for aligning multiple parallel data signals in the embodiment of the present invention includes the following steps:

[0022] S1: Generate a test analog signal with the same symbol period as the multi-channel parallel analog signal that needs to be aligned (this embodiment aligns 2-way parallel data signals), and the test analog signal is preferably PRBS (Pseudo-Random BinarySequence, pseudo-random binary sequence) Signal: Divide the test analog signal into 2 channels, respectively perform analog-to-digital conversion on the 2 test analog signals, and obtain 2 test digital signals: test digital signal 1 and test digital signal 2, and transfer to S2.

[0023] S2: In the two test digital signals respectively, synchronously acquire sequences of N symbol period lengths: I(n) and Q(n), N>2M, M is the define...

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Abstract

The invention discloses an alignment method and system of multiple paths of parallel data signals, and relates to the field of reception of multiple paths of parallel signals. The method comprises the following steps: performing analog-to-digital conversion on two paths of test analog signals to obtain two paths of test digital signals, computing two paths of adjustment parameters according to the two paths of test digital signals, adjusting the corresponding parallel digital signals according to the adjustment parameters, and the adjusted parallel digital signals are parallel data automatically aligned by the alignment method and system disclosed by the invention. By adoption of the alignment method and system disclosed by the invention, the paths of parallel data can be aligned simply and accurately, receiving terminal data demodulation errors are avoided, use of people is very convenient, and thus the alignment method and system is suitable for popularization.

Description

technical field [0001] The invention relates to the field of receiving multi-channel parallel signals, in particular to a multi-channel parallel data signal alignment method and system. Background technique [0002] In optical communication and wireless communication systems, multiple channels of parallel analog signals, such as the I channel and Q channel of a QPSK (Quadrature Phase Shift Keying, Quadrature Phase Shift Keying) signal, are often received and processed in real time. Multi-channel parallel analog signals are generally converted into multiple parallel digital signals through multiple high-speed ADC (Analog Digital Converter, analog-to-digital converter) chips, and then use high-speed transceiver equipment to receive parallel digital signals and process them. The transceiver device is, for example, an FPGA (Field Programmable Gate Array, Field Programmable Gate Array) and an ASIC (Application Specific Integrated Circuit, Application Specific Integrated Circuit) ...

Claims

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Application Information

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IPC IPC(8): H04L7/00
CPCH04L7/0016
Inventor 孟令恒曾韬李婕江风
Owner WUHAN POST & TELECOMM RES INST CO LTD
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