System and method used for field-programmable gate array chip file loading

Abstract

The invention discloses a system used for field-programmable gate array (FPGA) chip file loading. The system is characterized by comprising an upper computer module, an intermediate software communications architecture (SCA) module, a first FPGA chip and at least one second FPGA chip; the upper computer module is used for sending a control instruction to the intermediate SCA module, wherein the control instruction contains the name of a function algorithm file; the intermediate SCA module is used for receiving the control instruction, finding the function algorithm file according to the control instruction, and uploading the function algorithm file to the first FPGA chip; the first FPGA chip is used for the bootload of the function algorithm file to the second FPGA chips; each second FPGA chips is used for uploading a function algorithm so as to achieve the corresponding function. The invention further discloses a method used for the field-programmable gate array (FPGA) chip file loading.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a system and method for loading field-programmable gate array (English full name: Field-Programmable Gate Array, English abbreviation: FPGA) chip files. Background technique [0002] At present, digital signal processing is generally carried out at the intermediate frequency, and most operations are realized by FPGA chips. In order to dynamically reconfigure the FPGA chip in real time to load different software designs and quickly realize function switching, the current main implementation methods are divided into static system reconfiguration and dynamic system reconfiguration. Static system reconfiguration refers to the static reloading of the logical functions of the target system, that is, a system that can only be configured before operation. Under the control of external logic, the FPGA chip function can realize the change of chip logic function by re-downlo...

AI Technical Summary

Problems solved by technology

In the process of reconfiguring data, the old logic function is lost, the new logic function has not been established, there is a time slot for system reconfiguration, and the system function cannot be dynamically continuous

Dynamic system reconfiguration means that the chip can realize the change of internal logic blocks and connection lines during operation, which can solve the above-mentioned problem that cannot be dynamically continuous, but the implementation process of this solution is relatively complicated, and the file loading rate is low

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