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120 results about "System reconfiguration" patented technology

System Reconfiguration. Reconfiguration is the process of adding hardware units to, or removing hardware units from, a configuration. Units can be either: Online: Units in use by a system are called online. When both physically and logically online, a unit is available to be used by the system.

Method and system for continuous monitoring and diagnosis of body sounds

A method and system is invented for automated continuous monitoring and real-time analysis of body sounds. The system embodies a multi-sensor data acquisition system to measure body sounds continuously. The sound signal processing functions utilize a unique signal separation and noise removal methodology by which authentic body sounds can be extracted from cross-talk signals and in noisy environments, even when signals and noises may have similar frequency components or statistically dependent. This method and system combines traditional noise canceling methods with the unique advantages of rhythmic features in body sounds. By employing a multi-sensor system, the method and system perform cyclic system reconfiguration, time-shared blind identification and adaptive noise cancellation with recursion from cycle to cycle. Since no frequency separation or signal/noise independence is required, this invention can provide a robust and reliable capability of noise reduction, complementing the traditional methods. The invention further includes a novel method by which pattern recognition of groups of key parameters can be used to diagnosis physical conditions associated with body sounds, with confidence intervals on the diagnostic criterion to indicate accuracy of diagnosis.
Owner:WANG LE YI +1

Degradable three-machine redundancy fault-tolerant system

A degradable three-machine redundancy fault-tolerant system consists of three single machines such as a machine A, a machine B, a machine C which have the same structure, a public memory, an arbitration switching unit, and the output drivers of the three machines; the machine A, the machine B and the machine C achieve the exchange of treatment results among the three machines by reading and writing the output results of the single machines in the public memory so as to conduct three-machine voting; in addition, the machine A, the machine B and the machine C can also achieve three-machine or dual-machine synchronization by reading and writing the process information in the public memory; the machine A, the machine B and the machine C are connected with each other so that any one machine can read the status information whether another party is in normal work currently; the machine A, the machine B and the machine C are also connected with the arbitration switching unit and provide self-status information for the arbitration switching unit, and the arbitration switching unit can conduct the redundancy degrading of three-machine work/dual-machine work/single-machine work and the redundancy system reconfiguration of three-machine work/dual-machine work/single-machine work, in addition, the arbitration switching unit is also connected with the output drivers of the three machines and decides the use right of the machine A, the machine B and the machine C to the output line; and as for the three machines in normal work, the output is provided with a priority order, namely the machine A-the machine B-the machine C in sequence. The invention has the advantages of high reliability and long service life.
Owner:BEIHANG UNIV

Fault-tolerant combined method of strapdown inertial integrated navigation system for underwater vehicles

The invention provides a fault-tolerant combined method of a strapdown inertia integrated navigation system for underwater vehicles. The method is composed of a strapdown inertial navigation system SINS, a terrain aided navigation system TAN, a Doppler velocity log DVL and a magnetic compass pilot MCP, and realizing an integrated navigation process through a decentralized filter structure and an intelligent fault-tolerance method. The method comprises the following steps of constructing sub-filters respectively with the SINS as a reference navigation system and the TAN, the SINS and the DVL, and the SINS and the MCP, extracting related characteristic quantities from the sub-filters to transmit them into fault diagnosis modules composed of a supporting vector machine, determining if faultsexist in the TAN, the DVL or the MCP, if the faults exist, information of the TAN, the DVL or the MCP with the faults is screened, then carrying out a system reconfiguration process, and then feedingback errors outputted from a main filter to the SINS for correction. The method can guarantee a good reliability and a high fault tolerance of a strapdown inertial integrated navigation system for underwater vehicles, especially make a support vector machine trained in small samples have a strong popularization capability, and provide a novel method for a fault diagnosis.
Owner:SOUTHEAST UNIV

Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem

A multiprocessor computer architecture incorporating a plurality of programmable hardware memory algorithm processors (“MAP”) in the memory subsystem. The MAP may comprise one or more field programmable gate arrays (“FPGAs”) which function to perform identified algorithms in conjunction with, and tightly coupled to, a microprocessor and each MAP is globally accessible by all of the system processors for the purpose of executing user definable algorithms. A circuit within the MAP signals when the last operand has completed its flow thereby allowing a given process to be interrupted and thereafter restarted. Through the use of read only memory (“ROM”) located adjacent the FPGA, a user program may use a single command to select one of several possible pre-loaded algorithms thereby decreasing system reconfiguration time. A computer system memory structure MAP disclosed herein may function in normal or direct memory access (“DMA”) modes of operation and, in the latter mode, one device may feed results directly to another thereby allowing pipelining or parallelizing execution of a user defined algorithm. The system of the present invention also provides a user programmable performance monitoring capability and utilizes parallelizer software to automatically detect parallel regions of user applications containing algorithms that can be executed in the programmable hardware.
Owner:SRC COMP

Embedded VxWorks based satellite attitude and orbit control system fault simulation system and method

The invention relates to an embedded VxWorks based satellite attitude and orbit control system fault simulation system and method, which adopts a host computer and a target machine technology to realize a single machine model and a failure mode. The method comprises the following steps. A fault simulation host computer runs the Matlab modeling software, establishes a fault model based on Simulink, and generates a target application under the VxWorks real-time operating system under. A fault simulation target machine, connected with the fault simulation host computer through a network, runs the VxWorks real-time operating system and the target application for fault simulation. A fault injection and instruction control machine, connected with the fault simulation target machine and a satellite mounted single-mode machine respectively for transmitting the failure mode instruction of the single-mode machine to realize the switching between the single-mode simulation serial port of the fault simulation target machine and the real single-mode serial port of the satellite mounted single-mode machine. The system and the method of the invention can carry out fault diagnosis and system reconfiguration tests to improve the fault-tolerant ability of the single-machine hardware and the attitude track working in the failure mode of the satellite attitude control system so as to ensure the safety of the satellite.
Owner:SHANGHAI AEROSPACE CONTROL TECH INST

Algorithmically programmable memory tester with history FIFO's that aid in ERROR analysis and recovery

The problem is to branch back to an appropriate location within a memory tester test program, and also restore its state of algorithmic control, when an error associated therewith occurs later in time at the DUT. Owing to delays in pipelines connecting the program execution environment to the DUT and back again. These delays allow the program to arbitrarily advance beyond where the stimulus was given. The arbitrary advance makes it difficult to determine the exact circumstances that were associated with the error. A branch based on the error signal can restart a section of the test program, but it is likely only a template needing further test algorithm control information that varies dynamically as the test program executes. The solution is to equip the memory tester with History FIFO's whose depths are adjusted to account for the sum of the delays of the pipelines, relative to the location of that History FIFO. When the error flag is generated the desired program location and state information is present at the bottom of an appropriate History FIFO. This is also readily applicable when the test program uses an ALU to generate its own DUT stimuli, as well as to the case when the test program / ALU addresses an intermediate Buffer Memory whose contents are central to the nature of the testing the DUT is to undergo. The first is an ALU History FIFO, while the second is a Buffer Memory History FIFO. There can also be ECR History FIFO's. There is a mechanism to track system re-configuration as it occurs and adjust the depths of the various History FIFO's according to resulting pipeline depth. There is a mechanism to freeze the contents of a History FIFO upon the generation of an error. A History FIFO can be extended to allow a branching instruction in the test program to not prematurely respond to an error flag sooner than the pipeline delay needed for that error flag's value to be determined by a cause located within the test program.
Owner:ADVANTEST CORP

Power system grid structure reconfiguration and optimization method based on fuzzy chance constraint

The invention relates to a power system grid structure reconfiguration and optimization method based on fuzzy chance constraints, which belongs to the field of power system security defense and restoration control. The power system grid structure reconfiguration and optimization method comprises a grid structure reconfiguration and optimization model establishing module and a grid structure reconfiguration and optimization algorithm module. The power system grid structure reconfiguration and optimization method adopts triangular fuzzy variables for representing line operation time and restoration reliability, defines an restoration reliability index for evaluating performance of a target grid structure, considers unit start-up time limit, establishes a grid structure reconfiguration and optimization model based on fuzzy chance constraints under the framework of the fuzzy chance constraints, adopts a solution method of combining fuzzy simulation, a crossed particle swarm optimization algorithm and a Dijkstra algorithm, optimizes and determines unit start-up sequence, and reconfigures a restoration grid structure with shortest reconfiguration time and highest reliability. According to the power system grid structure reconfiguration and optimization method based on fuzzy chance constraints, the fuzziness of operation time and restoration reliability when the line is put into operation at the grid structure reconfiguration stage is reasonably considered, the optimized and determined optimal grid structure reconfiguration scheme takes both system reconfiguration speed and safety requirements into account, and the power system grid structure reconfiguration and optimization method has more practical significance.
Owner:YUNNAN ELECTRIC POWER DISPATCH CONTROL CENT +1

Complex system reliability evaluation method based on multiple agents

The invention discloses a complex system reliability evaluation method based on multiple agents. The method comprises the following steps: 1, elements of the Agent-based complex system are abstracted,and according to the composition of the complex system, the elements are abstracted to three kinds of Agents: a management kind, a system kind and a guarantee kind; 2, a hybrid hierarchy-based Agentinteraction structure is built, the hybrid hierarchy structure is adopted, and the interaction structure with centralized main control coordination and distributed local coordination is built; 3, element function behaviors are modeled, and according to functions of the Agents and an interaction rule, a life state diagram of the Agents is built; 4, element fault behaviors are modeled, a unit-levelRBD model for the Agents is built, and the fault time for unit random sampling is used as fault clock stock; 5, a system recovery behavior is modeled, system reconfiguration and maintenance are carried out according to a damage degree, a maintenance success rate is set, and the maintenance time is acquired through sampling; and 6, a complex system reliability evaluation mechanism is built, Monte Carlo simulation based on a complex system Agent model is carried out, and the complex system reliability is solved according to Rs=ns/n.
Owner:BEIHANG UNIV

Actively stabilized, single input beam, interference lithography system and method

An interference lithography system is described that is capable of exposing high resolution patterns in photosensitive media and employing yield increasing active stabilization techniques needed in production environments. The inventive device utilizes a division-of-wavefront interference lithography configuration which divides a single large field size optical beam using one or more mirrors, and is actively stabilized with a subsystem employing; a phase modulator operating on each divided wavefront section; a novel feedback apparatus for observing the relative phase shifts between interfering wavefront sections; and a control system for holding the relative phase shifts constant. The present invention also includes; a method for shaping the illumination beam's intensity distribution for more efficient power utilization and greater feature size uniformity; a horizontal substrate loading configuration compatible with robotic handling; an automated pattern pitch calibration for simple, flexible system reconfiguration; a compact clean-room compatible superstructure for increased passive stability in high vibration manufacturing environments; and a method for optimizing the polarization state of the interfering beam sections in a multiple mirror system.
Owner:AZTEC SYST

On-orbit fault countermeasure method based on multi-flexible appendage satellite dynamics optimization control mode

The invention provides an on-orbit fault countermeasure method based on a multi-flexible appendage satellite dynamics optimization control mode. The on-orbit fault countermeasure method comprises the following steps that a three-axis attitude controller of a multi-flexible appendage satellite adopts a long-life gyroscope in a normal-on mode, attitude angular speed information is provided for the attitude controller, and the capacity of the three-axis attitude controller for coping with characteristic frequency lowering of the multi-flexible appendage satellite is improved. The on-orbit fault countermeasure method based on the multi-flexible appendage satellite dynamics optimization control mode solves the problems that in the launching environment, the small-probability fault of great reducing of stiffness of a satellite large flexible appendage connecting link occurs, the fault causes great lowering of the system frequency of a satellite under an on-orbit free state and the constraint frequency of a corresponding large flexible appendage, the original theoretical allowance range of a control system can be exceeded, and therefore satellite on-orbit safe operating is menaced. According to the on-orbit fault countermeasure method based on the multi-flexible appendage satellite dynamics optimization control mode, whether the flexible appendage characteristic frequency is changed or not can be found as soon as possible, whether the flexible appendage characteristic frequency is within the allowance range or not is determined, if the flexible appendage characteristic frequency exceeds the allowance, the flexible appendage characteristic frequency needs to shift into a control mode of the offset characteristic mode frequency in time to achieve system reconfiguration, and satellite safety and user requirements are ensured.
Owner:CHINA ACADEMY OF SPACE TECHNOLOGY
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