Parallel RP interleaving method for Turbo codes, and parallel RP interleaver for Turbo codes

An interleaver and one-line technology, applied in the field of turbo encoding and decoding, can solve the problems of poor decoding performance and complexity of the interleaver, and achieve the effect of hardware implementation with less storage, low complexity, and simple generation method

Inactive Publication Date: 2017-12-22
CHINA ELECTRONICS TECH GRP NO 7 RES INST
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Problems solved by technology

[0004] In order to overcome the poor decoding performance and relatively complicated technical problems of the interleaver described in the prior art, the present invention adopts the following technical solutions:

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  • Parallel RP interleaving method for Turbo codes, and parallel RP interleaver for Turbo codes
  • Parallel RP interleaving method for Turbo codes, and parallel RP interleaver for Turbo codes
  • Parallel RP interleaving method for Turbo codes, and parallel RP interleaver for Turbo codes

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Embodiment Construction

[0021] The accompanying drawings are for illustrative purposes only, and should not be construed as limitations on this patent; in order to better illustrate this embodiment, certain components in the accompanying drawings will be omitted, enlarged or reduced, and do not represent the size of the actual product; for those skilled in the art It is understandable that some well-known structures and descriptions thereof may be omitted in the drawings. The positional relationship described in the drawings is for illustrative purposes only, and should not be construed as a limitation on this patent.

[0022] Such as figure 1 Shown, a kind of Turbo code parallel RP interleaving method, this method comprises the following steps:

[0023] Step 1: According to the code length and the degree of parallelism (the number of blocks), write the original sequential natural sequence into a matrix in order. The size of the matrix is ​​W×L, N is the length of the entire code block, and L is the...

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Abstract

The invention relates to a parallel RP interleaving method for Turbo codes, and a parallel RP interleaver for the Turbo codes. The interleaver comprises a matrixing module, a line permutation module, a row permutation module, and a screening module, wherein the matrixing module writes a natural sequence in an original order into a matrix according to the order; the line permutation module adopts the line RP criterion for each line in the matrix; the row permutation module adopts the row RP criterion for each row in the matrix; and the screening module carries out screening on parameter values in the line RP criterion and the row RP criterion, and selects the interleaver with the largest d<free> as a final interleaver. The interleaver provided by the invention has the advantages of good decoding performance, low complexity, and small hardware storage volumes; and the decoding performance of the interleaver can exceed that of a standard QPP interleaver.

Description

technical field [0001] The invention relates to the field of Turbo coding and decoding, and more specifically, to a parallel RP interleaving method of Turbo codes and a parallel RP interleaver. Background technique [0002] The interleaver has an important influence on the performance of Turbo decoding and is the core part of Turbo codes. It can make the codewords after Turbo encoding random, so as to achieve excellent performance. There are two basic principles for the design of the interleaver: 1. The longer the interleaver length, the better the Turbo decoding performance; 2. The sequence after interleaving is as random as possible after encoding, so as to avoid generating codewords with low code weight after interleaving. . Therefore, in the case of a fixed interleaving length, a good interleaver can reduce the generation of low code repetition codewords and improve decoding performance. [0003] Existing interleavers include uniform interleavers, S-random interleaver...

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Application Information

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IPC IPC(8): H03M13/27
CPCH03M13/2771
Inventor 张欣腾潢龙余红明崔苗李金勇
Owner CHINA ELECTRONICS TECH GRP NO 7 RES INST
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