Cascaded Spinal code construction method for reducing error performance

A cascading, high-performance technology, applied in the field of communication, can solve the problems of high decoding complexity and unrealization, and achieve the effect of reducing error probability, reducing error performance, and correcting burst errors

Active Publication Date: 2018-11-13
XIDIAN UNIV
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Problems solved by technology

The disadvantage of this scheme is that it can only use the channel puncturing probability to delete wrongly decoded bits under the BEC channel. In practice, m

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  • Cascaded Spinal code construction method for reducing error performance
  • Cascaded Spinal code construction method for reducing error performance
  • Cascaded Spinal code construction method for reducing error performance

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Embodiment Construction

[0035] Embodiments and technical effects of the present invention will be further described below in conjunction with the accompanying drawings.

[0036] refer to figure 1 , the realization steps of the present invention are as follows.

[0037] Step 1. Select an outer code encoding scheme.

[0038] Due to the unequal error protection characteristics of the Spinal code and the serial coding structure, it will lead to single or continuous errors in the tail bits of the information sequence, and the BCH code is a linear code with a strict description structure that can correct multiple random errors. The structure is simple, the iterative decoding speed is fast, and the performance is excellent, and when the cascade scheme is adopted, the BCH code as the outer code can quickly determine the single or continuous error of the original Spinal code according to the check equation. For this reason, the present invention selects BCH code for use, and the error correction performance...

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Abstract

The invention discloses a cascaded Spinal code construction method for reducing error performance for mainly solving the problem of poor transmission reliability due to high error performance of codesin the prior art. The implementation scheme is as follows: 1. selecting a BCH code with strong error correction capability to serve as an outer code according to the burst error correction capabilityB; 2. determining an outer code information bit according to an outer code parameter and an original Spinal code parameter in a selected outer code encoding scheme; 3. generating a segmentation checksequence p according to an encoded outer code information bit y; 4. merging an original information bit m with the segmentation check sequence p to generate an input sequence of a cascaded Spinal code; and 5. performing cascaded Spinal encoding to generate a channel input symbol. By adoption of the cascaded Spinal code construction method disclosed by the invention, the error probability of the tail bit of the Spinal code information sequence and the error performance of the Spinal code are reduced, thereby improving the transmission reliability of the communication system, and the cascaded Spinal code construction method can be applied to cellular communication, satellite communication and Internet of Things systems.

Description

technical field [0001] The invention belongs to the technical field of communication, and further relates to a construction method of a cascaded Spinal code, which can be used in cellular communication, satellite communication and Internet of Things systems, and improves the transmission efficiency and reliability of the system. Background technique [0002] The traditional Spinal code first divides the information bits into segments, uses the hash function to generate the hash state corresponding to each segment of the information sequence, generates the encoded bits of each segment according to the hash state of each segment, and then generates the encoding symbols through the mapping function. For example, in "Two-Way Spinal Codes" (IEEE International Symposium on Information Theory, 2016, pp1919-1923, July 2016), Weiqiang Yang, Ying Li et al. gave a coding structure of a bidirectional Spinal code that improves the error performance of the Spinal code and transfer scheme....

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Application Information

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IPC IPC(8): H04L1/00
CPCH04L1/0061H04L1/0064H04L1/007
Inventor 李颖马锦涛胡杨
Owner XIDIAN UNIV
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