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AES encryption arithmetic unit, AES encryption circuit and encryption method thereof

A computing unit and encryption circuit technology, applied in computing, electrical digital data processing, computer security devices, etc., can solve problems such as increasing circuit area

Active Publication Date: 2018-12-18
ANHUI UNIVERSITY OF TECHNOLOGY AND SCIENCE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The embodiment of the present invention provides an AES encryption circuit, which aims to solve the problem that the existing AES encryption circuit based on merge operation optimizes the length of the critical path at the cost of increasing the circuit area

Method used

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  • AES encryption arithmetic unit, AES encryption circuit and encryption method thereof
  • AES encryption arithmetic unit, AES encryption circuit and encryption method thereof
  • AES encryption arithmetic unit, AES encryption circuit and encryption method thereof

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Embodiment Construction

[0041] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0042] The existing computing units mainly include: row shift computing unit, column mixing computing unit, key adding computing unit, and byte replacement computing unit are all existing computing units, and the computing methods of the computing units are as follows:

[0043] key addition unit

[0044] The key addition operation unit performs the key addition operation, the key addition operation is a very simple operation, the key addition operation is defined as the state matrix plus the sub-key matrix, and the addition operation here is GF (2) field addition operation, Bitwise XOR operation, ...

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Abstract

The invention is applicable to the field of encryption technology and provides an AES encryption arithmetic unit, an AES encryption circuit and an encryption method thereof. The AES encryption operation unit combines all the linear transformation operations in the wheel transformation into two composite matrices, the composite matrix delta and the composite matrix lambda through the combination and synthesis operation of the constant matrices, thereby shortening the critical path of the AES encryption circuit and simultaneously reducing the realization area of the AES encryption circuit.

Description

technical field [0001] The invention belongs to the technical field of encryption and provides an AES encryption operation unit, an AES encryption circuit and an encryption method thereof. Background technique [0002] AES (Advanced Encryption Standard, Advanced Encryption Standard) is a new generation of block symmetric cipher algorithm formulated by the National Institute of Standards and Technology in 2001 to replace the original DES (Data Encryption Standard, Data Encryption Standard). At present, the AES encryption algorithm has been adopted by many international standard organizations, and it is currently the most widely used block encryption algorithm. [0003] The data packet length of the AES encryption algorithm is 128 bits, and the key lengths are 128, 192 and 256 bits, which are called AES-128, AES-192, and AES-256 respectively. The AES algorithm is an iterative algorithm. Each iteration can be called a round transformation. The key length is different, and the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F21/60
CPCG06F21/602
Inventor 张肖强刘宇畅郑辛星梁广俊王广亮王宸宇王维
Owner ANHUI UNIVERSITY OF TECHNOLOGY AND SCIENCE
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