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Method, device, device and readable storage medium for accessing bus

A storage medium and bus technology, applied in the computer field, can solve the problems that two control chips are not allowed to access at the same time, access failure, the master device and the slave device cannot use the same bus at the same time, etc.

Active Publication Date: 2021-10-29
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the same bus does not allow two control chips to access at the same time, that is, the master device and the slave device cannot use the same bus at the same time
For example: when the master device transmits data to the slave device through the No. 1 bus, the slave device cannot access the No. 1 bus; if the master device and the slave device access the No. 1 bus at the same time, an access failure will occur, resulting in an abnormal system alarm

Method used

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  • Method, device, device and readable storage medium for accessing bus
  • Method, device, device and readable storage medium for accessing bus
  • Method, device, device and readable storage medium for accessing bus

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Embodiment Construction

[0040] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0041] The embodiment of the invention discloses a method, device, device and readable storage medium for accessing a bus, so as to prevent a master device and a slave device from accessing the same bus at the same time.

[0042] see figure 1 , a method for accessing a bus provided by an embodiment of the present invention, comprising:

[0043] S101. Real-time monitoring of the main bus access information of the main PCIE Switchtec end and the slave bus acces...

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PUM

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Abstract

The invention discloses a method for accessing a bus, comprising: monitoring in real time the main bus access information of the main PCIE Switchtec end and the slave bus access information of the slave PCIE Switchtec end; controlling the bus according to the main bus access information, the slave bus access information and a preset access mechanism The access operation of the master PCIE Switchtec end and the slave PCIE Switchtec end is to control the master PCIE Switchtec end and the slave PCIE Switchtec end to access different buses at the same time based on the actual access situation, thereby preventing the master device and the slave device from accessing the same bus at the same time. Correspondingly, the device, device and readable storage medium for accessing the bus disclosed in the present invention also have the above-mentioned technical effects.

Description

technical field [0001] The present invention relates to the field of computer technology, more specifically, to a method, device, device and readable storage medium for accessing a bus. Background technique [0002] In dual redundant physical devices, one physical device is the master device, and the control chip in it is the master PCIE Switchtec; the other physical device is the slave device, and the control chip in it is the slave PCIE Switchtec. If there is a problem with the master device, the slave device will continue to run various services instead of the master device. Among them, one or more buses are connected between the slave device and the master device, through which the master device and the slave device can perform resource sharing and data synchronization. [0003] However, the same bus does not allow two control chips to access at the same time, that is, the master device and the slave device cannot use the same bus at the same time. For example: when th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/40G06F13/42
CPCG06F13/4022G06F13/4221G06F2213/0026
Inventor 黄玉龙
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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