A Network Packet Header Processor Based on Parallel Microengine

Abstract

The invention discloses a network message header processor based on a parallel micro-engine, comprising a micro-engine cluster, a polling scheduler module, a task scheduler module, a memory module, a micro-engine cluster, and a plurality of parallel and independent working micro-engines Each microengine loads corresponding microcode instructions, and according to the microcode instructions, multiple threads are scheduled to access the relevant table items in the corresponding storage units in the memory module through the task scheduler module, and complete the packet header data frame parsing, classification and processing. Forward processing, and feed back the working status of each thread to the polling scheduler; the polling scheduler module polls the thread working status of each thread of each micro-engine, and submits the received message header to the one with more idle threads The micro-engine; the memory module, used for storing related table items and micro-code instructions of the micro-engine required for parsing, classifying and forwarding processing of header data frames. The invention can guarantee the high-speed processing and high flexibility of the message, and meet the requirement of network large-scale data processing.

Description

technical field [0001] The invention relates to a network message header processor based on a parallel micro-engine, which belongs to the technical field of wired communication. Background technique [0002] At present, the micro-engine design of most network processor chips on the market adopts the pipeline mode. In the pipeline mode, the processing of data packets is divided into several stages, and each stage has fixed tasks. The processing process of data packets is to jump from one processing stage to the next processing stage until the processing is completed. Each pipeline stage contains one or more processing engines, and each task-oriented processing engine is optimized for a specific network task and its own instruction set. The pipeline architecture is based on a distributed programming model in which the application is divided into multiple pipeline stages. Each pipeline processing engine is optimized to handle specific tasks and instructions. The disadvantage...

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Problems solved by technology

The disadvantage of this mode is that it needs to evenly distribute the entire processing task to each stage of the pipeline, otherwise the pipeline will be disrupted, and in the pipeline mode, each micro-engine interacts with each other, and each micro-engine is not evenly busy , the utilization rate is low, and the message processing speed is slow, which cannot meet the needs of large-scale data processing in the future network

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