Time-triggered ethernet data frame capture, storage device and method
A time-triggered and storage device technology, which is applied in the field of network communication, can solve the problem that the capture method cannot meet the debugging and verification requirements of time-triggered Ethernet synchronization and communication functions, and achieve less processor time occupation, flexible filtering control, The effect of simplifying the data parsing process
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Publication Date
- 2021-11-09
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Abstract
Description
technical field
[0001] The invention belongs to the technical field of network communication, and relates to a time-triggered Ethernet data frame capture and storage device and method. Background technique
[0002] In the Ethernet conforming to the IEEE802.3 standard, the network device uses the event-triggered transmission mechanism, and the network device can access the network at any point in time, and the principle of first-come, first-served is adopted. Communication between network devices through a shared medium will inevitably lead to uncertain jitter and accumulated delays during the transmission of some messages. On the basis of standard Ethernet, ARINC proposed the ARINC664 Part7 standard AFDX network, adding virtual link (VL), bandwidth allocation gap (BAG), jitter management and other mechanisms in the data link layer, effectively reducing the message transmission process. The conflicts make the message real-time and deterministic, thus meeting the reliability ...
Examples
Embodiment Construction
[0092] The present invention will be further described below in conjunction with the accompanying drawings.
[0093] like figure 1 As shown, the time-triggered Ethernet data frame capture and storage device of the present invention includes a real-time clock unit, a data management unit, a data cache unit, a capture management unit, a PCIE controller, a PCI interface unit, and N data receiving channels, N≥1 ; Each data receiving channel includes a TTE interface unit, a MAC receiving unit, a filtering control unit, a descriptor queue unit and a data frame queue unit. Each part of the present invention will be described in detail below.
[0094] 1. Capture Management Unit
[0095] The capture management unit obtains the filter control information sent by the host computer through the PCIE controller and the PCI interface unit, including the oversize error frame reception enable signal oversize_en, the unaligned error frame reception enable signal unalign_en, and the check erro...