Uplink and downlink time slot synchronization device and method and computer readable storage medium

Abstract

The embodiment of the invention provides an uplink and downlink time slot synchronization device and method and a computer readable storage medium. The device comprises a radio frequency unit, a powerdivider and an amplification unit, wherein the radio frequency unit is used for demodulating an uplink and downlink time slot synchronization signal and a radio frequency signal based on a preset channel state information reference signal CSIRS, and synchronously transmitting the uplink and downlink time slot synchronization signal and the radio frequency signal to the power divider; the CSIRS islocated at a downlink and uplink switching position, and the power intensity of the CSIRS is higher than the overall power intensity of a downlink signal; and the amplification unit is used for synchronizing the uplink and downlink time slot synchronization signals and the radio frequency signals transmitted by the power divider, and controlling the transmission of the downlink signals and the uplink signals based on the uplink and downlink time slot synchronization signals.

Description

technical field [0001] The present invention relates to the technical field of mobile communication, in particular to an uplink and downlink time slot synchronization device, method and computer-readable storage medium. Background technique [0002] The radio frequency amplification devices (such as repeaters) that support the time division duplex (TDD) system all need an uplink and downlink synchronization signal to control the transceiver switch. At present, the industry mainly adopts two schemes to realize: scheme 1. The uplink and downlink time are transmitted through a modem The gap is demodulated, and then the transceiver switch is controlled. Solution 2: Use a radio frequency power detector to detect the uplink and downlink switching moments from the radio frequency signal envelope signal, and then control the transceiver switch. [0003] However, there are some problems in the above schemes: the implementation cost of scheme 1 is high, and the power consumption is r...

AI Technical Summary

Problems solved by technology

[0003]However, there are some problems in the above schemes: the implementation cost of scheme one is high, and the power consumption is relatively large; scheme two is not suitable for 5G standard signals, and 5G standard signals There is no obvious characteristic signal at the time of switching. If the second scheme is adopted, the detection accuracy is very low

Therefore, the industry does not yet have a low-cost uplink and downlink time slot synchronization solution suitable for 5G standard signals

Images