A memory cmos circuit

A memory and MOS transistor technology, applied in static memory, read-only memory, information storage, etc., can solve the reliability risks of high-voltage functional circuits, reduce the hot carrier injection effect, improve high-voltage resistance, and improve memory. performance effect

Active Publication Date: 2021-11-09
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of the shortcomings of the prior art described above, the object of the present invention is to provide a memory CMOS circuit for solving the problem of reliability risk in the high-voltage functional circuit in the existing memory CMOS circuit

Method used

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Effect test

Embodiment 1

[0027] Such as figure 1 As shown, this embodiment provides a memory CMOS circuit, and the memory CMOS circuit includes:

[0028] The high-voltage functional circuit 100 includes at least one MOS transistor, wherein the source terminal or drain terminal of one of the MOS transistors M1 is connected to the input high voltage HV; the high-voltage functional circuit 100 is used to realize that when the enable signal is valid, its output voltage gradually Increase and reach the maximum value HV;

[0029] The auxiliary clamping circuit 200 is arranged between the input high voltage HV and the source terminal or the drain terminal of the MOS transistor M1, and is used for inputting the source terminal or the drain terminal of the MOS transistor M1 during the rising phase of the output voltage. The voltage is clamped so that the clamping voltage HV_clamp is smaller than the input high voltage HV.

[0030] As an example, the high voltage functional circuit 100 includes one of a switc...

Embodiment 2

[0039] Such as Figure 4 As shown, the difference between this embodiment and Embodiment 1 is that the auxiliary clamp circuit 200 in this embodiment further includes: at least one third depletion-type high-voltage NMOS transistor MN3, and the third depletion-type high-voltage NMOS transistor MN3 The first connection end of the first depletion-type high-voltage NMOS transistor MN1 is connected to the first connection end of the first depletion-type high-voltage NMOS transistor MN1, and the second connection end of the third depletion-type high-voltage NMOS transistor MN3 is connected to the first depletion-type high-voltage NMOS transistor MN3. The second connection terminal of the transistor MN1 is connected, and the gate terminal of the third depletion-type high-voltage NMOS transistor MN3 is connected to another preset voltage HV2; wherein, the gate terminal of the third depletion-type high-voltage NMOS transistor MN3 is connected to The preset voltage HV2 is smaller than t...

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Abstract

The present invention provides a memory CMOS circuit. The memory CMOS circuit includes: a high-voltage functional circuit, including at least one MOS transistor, wherein a source terminal or a drain terminal of one of the MOS transistors is connected to an input high voltage; When it is effective, its output voltage gradually increases and reaches the maximum value; the auxiliary clamping circuit is arranged between the input high voltage and the source terminal or drain terminal of the MOS transistor, and is used to control the output voltage during the rising phase of the output voltage. The voltage input to the source terminal or the drain terminal of the MOS transistor is clamped so that the clamping voltage is lower than the input high voltage. The memory CMOS circuit provided by the invention solves the problem of reliability risk in the high-voltage functional circuit in the existing memory CMOS circuit.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, in particular to a memory CMOS circuit. Background technique [0002] In recent years, the development of flash memory (Flash Memory) has been particularly rapid. The main feature of flash memory is that it can keep stored information for a long time without power on, and it has high integration, fast access speed, easy erasing and resetting. It has the advantages of writing and so on, so it has been widely used in many fields such as microcomputer and automatic control. In order to further increase the bit density (Bit Density) of the flash memory while reducing the bit cost (Bit Cost), three-dimensional flash memory (3D NAND) technology has been developed rapidly. [0003] In the CMOS circuit of 3D NAND, there are usually some functional circuits (such as switching circuits and level shifting circuits, etc.) that work under high voltage, causing the MOS devices to be thermally loaded d...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): G11C16/30G11C5/14
CPCG11C16/30G11C5/147
Inventor赵利川
OwnerYANGTZE MEMORY TECH CO LTD