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Switch chip message dynamic storage method

A technology of switching chips and dynamic storage, which is applied in the directions of inter-program communication, multi-programming device, input/output to record carriers, etc., can solve the problems of high maintenance cost, high production cost of switching chips, and low input-output efficiency, etc. Achieve the effect of increasing cache capacity, improving input-output efficiency, and reducing production and maintenance costs

Active Publication Date: 2022-04-29
杭州云合智网技术有限公司
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The existing technology has the defects of high production cost of switching chips, high maintenance cost, and low input-output efficiency

Method used

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  • Switch chip message dynamic storage method

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Embodiment Construction

[0028] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, and the present invention will be further elaborated.

[0029] First, combine the Figure 1~3 The method for dynamically storing packets of a switching chip according to an embodiment of the present invention is used to improve traffic bursts, to ensure high priority and low latency, and to buffer the switching chip, and has a wide range of application scenarios.

[0030] Such as Figure 1~3 As shown, the switching chip message dynamic storage method of the embodiment of the present invention includes the following steps:

[0031] In S1, as in figure 1 As shown, several mapping queues are set in the switch chip.

[0032] Further, several mapping queues are set in the switch chip, including the following sub-steps:

[0033] In S11, such as figure 2 As shown, based on the 802.1q protocol, the priority of the message input to the switch ...

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PUM

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Abstract

The invention discloses a method for dynamically storing messages of a switch chip. The method comprises the following steps of: setting a plurality of mapping queues in the switch chip; the storage modes of the partial mapping queues are set, a plurality of first mapping queues are obtained, and the storage modes of the first mapping queues are only internal buffer storage modes; setting the storage mode of the rest mapping queues as a mixed storage mode, and obtaining a plurality of second mapping queues; setting an internal buffer storage threshold value and a mixed buffer storage threshold value of a plurality of second mapping queues; and the switching chip switches and applies the plurality of first mapping queues and the plurality of second mapping queues to store the messages in the internal buffer and the external buffer according to the flow state of the messages input into the switching chip. According to the invention, the low time delay characteristic of the switch chip is ensured, the cache capability of the switch chip is increased, the production cost and the maintenance cost of the switch chip are reduced, and the input-output efficiency of the switch chip is improved.

Description

technical field [0001] The invention relates to the technical field of switch chip software, in particular to a method for dynamically storing messages of a switch chip. Background technique [0002] In the existing technology, in the case of a burst, the switching device mainly absorbs burst packets by increasing the bandwidth of the switching chip or increasing the buffer capacity inside the chip, so as to achieve high priority and low delay, and low priority is not lost. The purpose of the package. [0003] The prior art has the defects of high production cost, high maintenance cost, and low input-output efficiency of switching chips. Contents of the invention [0004] According to an embodiment of the present invention, a method for dynamically storing messages of a switch chip is provided, including the following steps: [0005] Set several mapping queues in the switch chip; [0006] The storage mode of some mapping queues is set to obtain several first mapping q...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06G06F9/54
CPCG06F3/0656G06F3/0629G06F3/0602G06F9/544
Inventor 华杰鲁范旗周杉
Owner 杭州云合智网技术有限公司
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