Flash memory device and method for fabricating the same, and programming and erasing method thereof

a flash memory and memory device technology, applied in the field of flash memory devices, can solve the problems of difficult to obtain the margin of process for defining tunneling, difficult to reduce the cell size, and difficult to remove the hopping electrons that are moved (spread) to a lateral sid

Inactive Publication Date: 2006-07-06
ANAM SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This configuration effectively removes electrons moved laterally during programming, improving the reliability and retention of data in SONOS-type flash memory devices, particularly when storing 2-bit data in a single cell.

Problems solved by technology

However, it is impossible to decrease the cell size since it requires a high voltage on programming and erasing modes and it is difficult to obtain the margin of process for defining tunneling.
However, the aforementioned IEDM document has the following problems.
After programming, it is impossible to remove the hopping electrons moved (spread) to a lateral side by the programming electrical anneal.
Accordingly, even in case of Hot Hole Injection in a large amount on the erasing operation, the trapped electrons are not removed completely, thereby degrading reliability.
Especially, when separately programming data to the nitride layer around the source region and the drain region, for example, programming 2-bit data in one cell, the aforementioned problem becomes more serious.

Method used

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  • Flash memory device and method for fabricating the same, and programming and erasing method thereof
  • Flash memory device and method for fabricating the same, and programming and erasing method thereof
  • Flash memory device and method for fabricating the same, and programming and erasing method thereof

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Embodiment Construction

[0041] Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

[0042] Hereinafter, a flash memory device and a method for fabricating the same, and programming and erasing methods will be described with reference to the accompanying drawings.

[0043]FIG. 2 is a cross-sectional view illustrating a flash memory device according to the present invention. In the flash memory device according to the present invention, as shown in FIG. 2, an ONO layer 28 is formed on a p-type semiconductor substrate 21, wherein the ONO layer 28 is formed by sequentially stacking a first oxide layer 22, a nitride layer 23, and a second oxide layer 24. Then, a first control gate 25 is formed on the ONO layer 28, and second and third control gates 29 and 30 are formed on the ONO layer 28 at bot...

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Abstract

A flash memory device of SONOS structure and a method for fabricating the same, and programming and erasing operation methods, to improve reliability such as endurance and retention, are disclosed, which includes a first conductive type semiconductor substrate; an ONO layer on the semiconductor substrate; a first control gate on the ONO layer; second and third control gates on the ONO layer at both sides of the first control gate; and source and drain regions in the surface of the semiconductor substrate at both sides of the second and third control gates.

Description

[0001] This application claims the benefit of the Korean Application No. P2004-28282 filed on Apr. 23, 2004, which is hereby incorporated by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a flash memory device, and more particularly, to a flash memory device having an SONOS (Polysilicon-Oxide-Nitride-Oxide-Semiconductor) structure and a method for fabricating the same, and programming and erasing methods thereof, to improve reliability such as endurance and retention. [0004] 2. Discussion of the Related Art [0005] A typical example of a nonvolatile memory device, in which data is not erased even though a voltage is not applied, is EEPROM (Electrically Erasable Programmable Read Only Memory). Generally, the EEPROM takes a scheme using a floating gate-type cell. With rapid development of high-integration device, it necessarily requires the decrease in a size of the floating gate-type cell according to the related art. Ho...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): G11C7/00H10B69/00G11C16/04H01L21/28H01L21/336H01L29/51H01L29/76H01L29/792
CPCG11C16/0475H01L21/28282H01L29/513H01L29/66833H01L29/792H01L29/7923H01L29/40117
InventorLEE, SANG BUM
OwnerANAM SEMICON