Systems and methods for implementing operational transformations for restricted computations of a mixed-signal integrated circuit
a mixed-signal integrated circuit and operational transformation technology, applied in biological models, multi-programming arrangements, instruments, etc., can solve the problems of increasing the computational cost of traditional digital circuitry, and requiring significant circuitry area, so as to improve and reduce the computational performance of the mixed-signal integrated circuit.
Pending Publication Date: 2021-09-16
MYTHIC INC
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Benefits of technology
The patent text describes a method to improve the performance of a mixed-signal integrated circuit by transforming a suboptimal graph component to an optimal one. This involves increasing or decreasing the values of biases associated with weights of a matrix multiply accelerator based on attributes of the second activation function. The technical effect of this invention is to enhance the speed and efficiency of the mixed-signal integrated circuit.
Problems solved by technology
Still, while neural network models implementing one or more neural network algorithms may not require a same amount of compute resources, as required in a training phase, deploying a neural network model in the field continues to require significant circuitry area, energy, and compute power to classify data and infer or predict a result.
Typical weighted sum calculations for a machine learning application, however, include hundreds or thousands of weights which causes the weighted sum calculations to be computationally expensive to compute with traditional digital circuitry.
Specifically, accessing the hundreds or thousands of weights from a digital memory requires significant computing time (i.e., increased latency) and significant energy.
However, latency problems are manifest when these remote artificial intelligence processing systems are used in computing inferences and the like for remote, edge computing devices or in field devices.
That is, when these traditional remote systems seek to implement a neural network model for generating inferences to be used in remote field devices, there are unavoidable delays in receiving input data from the remote field devices because the input data must often be transmitted over a network with varying bandwidth and subsequently, inferences generated by the remote computing system must be transmitted back to the remote field devices via a same or similar network.
Additionally, these traditional circuit often cannot manage the computing load (e.g., limited storage and / or limited compute) and may often rely on remote computing systems, such as the cloud, to perform computationally intensive computations and store the computation data (e.g., raw inputs and outputs.
Thus, constant and / or continuous access (e.g., 24×7 access) to the remote computing systems (e.g., the cloud) is required for continuous operation, which may not be suitable in many applications either due to costs, infrastructure limitations (e.g., limited bandwidth, low grade communication systems, etc.), and the like.
However, attempts to implement some of these traditional AI computers and systems at an edge device (e.g. remote field device) may result in a bulky system with many circuits, as mentioned above, that consumes significant amounts of energy due to the required complex architecture of the computing system used in processing data and generating inferences.
Thus, such a proposal without more may not be feasible and / or sustainable with current technology.
Method used
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[0040]The following description of preferred embodiments of the present application are not intended to limit the inventions to these preferred embodiments, but rather to enable any person skilled in the art of to make and use these inventions.
1. Overview
[0041]In traditional integrated circuits used in implementing computationally-intensive programs or applications (e.g., deep neural network algorithms) and the like, the typical integrated circuit (IC) architecture includes relatively large circuits requiring large area and power to operate and perform computations. This is because processing digital signals (e.g., binary signals) often requires large and power hungry implementations of circuits. Thus, for many technological implementations of computationally-intensive programs, such as artificial intelligence models, the resulting computer ICs having these large circuits for processing digital signals are also large and therefore, less feasible to include in space-constrained edge ...
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Systems and methods for improving a computational performance of a mixed-signal integrated circuit includes identifying a suboptimal graph component of a computation graph of a subject application, wherein: (i) the computation graph comprises a plurality of graphical nodes representing computational operations and a plurality of graphical edges representing data dependencies between the graphical nodes, and (ii) the suboptimal graph component comprises a subset of the plurality of graphical nodes and the plurality of graphical edges that do not satisfy an optimal operation threshold; at compile time, selectively applying an optimizing transformation to the suboptimal graph component based on attributes of a first activation function within the suboptimal graph component, wherein the optimization transformation, when applied, transforms the suboptimal graph component to an optimal graph component that satisfies the optimal operation threshold; and reconstructing the computation graph using the optimal graph component in a place of the suboptimal graph component.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation of U.S. patent application Ser. No. 17 / 060,338, filed 1 Oct. 2020, which claims the benefit of U.S. Provisional Application No. 62 / 940,487, filed 26 Nov. 2019, U.S. Provisional Application No. 62 / 978,910, filed 20 Feb. 2019, and US Provisional Application No. 62 / 990,701, filed 17 Mar. 2020, which are incorporated in their entireties by this reference.TECHNICAL FIELD[0002]The inventions described herein relate generally to the integrated circuitry architecture field, and more specifically to new and useful intelligent integrated circuits and methods of computing with the intelligent integrated circuit in the integrated circuity architecture field.BACKGROUND[0003]Today, the various implementations of artificial intelligence and machine learning are driving innovation in many fields of technology. Artificial intelligence (AI) systems and artificial intelligence models (including algorithms) are defined by m...
Claims
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IPC IPC(8): G06N3/063G06N3/04G06F9/50G06K9/62G06N3/08
CPCG06N3/0635G06N3/0481G06N3/08G06K9/6296G06F9/5027G06N3/048G06F18/24133G06F18/29G06N3/065
InventorMORTEN, ANDREWSTOTZER, ERICWU, PEI-CITZOUFRAS, MICHAILFICK, DAVID
OwnerMYTHIC INC