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A circuit for compressing data and a processor employing same

A processor and data storage technology, applied in the field of structure compression, can solve the problems of low implementation cost and fast processing speed

Inactive Publication Date: 2010-03-31
LINEAR ALGEBRA TECH LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] This application solves the storage wall problem by incorporating compression\decompression circuits into the hardware of the processor, so that data transfer and decompression do not occupy processor resources and do not have a lot of delay while keeping the implementation cost low and the processing speed fast

Method used

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  • A circuit for compressing data and a processor employing same
  • A circuit for compressing data and a processor employing same
  • A circuit for compressing data and a processor employing same

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Embodiment Construction

[0030] This application employs a method that exploits the null data contained in large floating-point matrix datasets such as those used in 3D computer graphics, game physics (rigid body dynamics), finite element analysis (FEA), and search engines. A new method for values. However, the present application is applicable to other data structures and is not limited to matrix-based structures.

[0031] The inventors have realized that for many matrices a large number of entries are zero-filled, but these zeros occupy 32 or 64 bits of the floating point representation, these zeros must be fetched from on-chip or off-chip memory and may cause the processor Busy with trivial operations on zeros fetched from memory or registers.

[0032] The present application provides for storing a matrix structure arranged in rows and columns of data values ​​in a compressed structure from which zero data values ​​have been removed. An associative map is provided for the compressed structure tha...

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Abstract

The present application addresses a fundamental problem in the design of computing systems, that of minimising the cost of memory access. This is a fundamental limitation on the design of computer systems as regardless of the memory technology or manner of connection to the processor, there is a maximum limitation on how much data can be transferred between processor and memory in a given time, this is the available memory bandwidth and the limitation of compute power by available memory bandwidth is often referred to as the memory-wall. The solution provided creates a map of a data structureto be compressed, the map representing the locations of non-trivial data values in the structure (e.g. non-zero values) and deleting the trivial data values from the structure to provide a compressedstructure.

Description

technical field [0001] The present application relates to data compression methods and in particular to the compression of structures. Background technique [0002] Compression methods and algorithms are well known in the art for reducing the amount of data to be stored in memory. In particular, different algorithms are known for different data types, eg JPEG for images. [0003] This application concerns the compression of matrix structures. [0004] One approach previously attempted (Moloney and Geraghty WO2006120664) involved compressing the matrix structure by converting an unstructured matrix into a structured matrix. This compression method effectively eliminates data duplication above and below the main diagonal of the matrix. [0005] Another method for processing matrix structures is proposed in US6,591,019, where a matrix of data values ​​is compressed into a structure comprising a bitmap, a symbol map and a data map. The bitmap includes a string of 2-bit entri...

Claims

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Application Information

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IPC IPC(8): H03M7/30
CPCG06F9/30043G06F9/3824H03M7/3066H03M7/30
Inventor 大卫·莫洛尼
Owner LINEAR ALGEBRA TECH LTD
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