Layout structure for promoting pixel defection detectivity of thin film transistor substrate
A thin-film transistor and layout structure technology, which is applied in the field of thin-film transistor substrate layout structure, can solve the problems of labor cost and GCshort did not propose a solution, and achieve the effect of saving labor cost
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[0014] In order to describe in detail the layout structure of the present invention to improve the pixel defect detection rate of the thin film transistor substrate, please refer to figure 1 and figure 2 . figure 1 It is a layout structure for improving the pixel defect detection rate of the thin film transistor substrate of the present invention. The layout structure of the pixel defect detection rate of the TFT substrate of the present invention includes multiple columns of first data lines 22 and multiple rows of first scanning lines 24 . Multiple columns of first data lines 22 and multiple rows of first scanning lines 24 define a plurality of pixels, and a thin film transistor 26 is formed in each pixel, and the thin film transistor 26 is used as a switch element, wherein a first metal The gate 28 of the thin film transistor 26, the first scanning line 22 and the common electrode wiring 38 are formed simultaneously; the drain 32, the source 30 and the first data line 22...
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