A
graphics controller for a
System-On-a-
Chip (SOC) used with a battery-powered device allows for reduced-power display
modes. The
microprocessor writes to a frame buffer that is a single, contiguous address block in
virtual memory. A
memory management unit (MMU) translates frame-buffer address to multiple physical blocks. The
graphics controller fetches pixels from the multiple physical blocks, including a block in an on-
chip memory and a block in an external memory. In a low-
power mode, pixels are only fetched from the lower-power on-
chip memory and not the higher-power external memory. A smaller display window is defined and pixels outside the window are replaced by
dummy data,.eliminating external-memory fetches. The smaller display window falls within the first block in the on-
chip memory. Status and other information can be displayed in the smaller display window during stand-by
modes, while a full-screen of data is displayed for full-power
modes.