Residue number systems (RNS) comparator

Abstract

The invention discloses a residue number systems (RNS) comparator, which comprises a first n-position phase inverter array, a modulus 2<n> adder, a second n-position phase inverter array, a modulus 2<n>-1 adder, a first n+1-position phase inverter array, a modulus 2<n>+1 adder, a third n-position phase inverter array, a second n+1-position phase inverter array, two input exclusive OR gates, a first carry save adder with end around carry, a second carry save adder with end around carry, a 2n-position binary adder, a first operational module, a second operational module, a first 1-position phase inverter, a second 1-position phase inverter and two input AND gates. According to the RNS comparator, subtraction operation is directly carried out in a residue number system, and an operation result in the residue number system is then converted to a binary system, so that the contrast process of the comparison is simplified, the resource consumption is reduced, and the operation speed is also improved.

Description

technical field

[0001] The invention belongs to the field of computers and integrated circuits, in particular to the design of a comparator for a remainder system. Background technique

[0002] Before introducing the comparator, first explain the remainder system (RNS, Residue Number Systems). The remainder system RNS is a numerical representation system that describes numbers through the remainder of a set of pairwise coprime remainder bases. by {m 1 ,m 2 ,...,m L} composed of L remainder bases, integer X, 0≤X<M, where M=m 1 × m 2 ×…×m L , there is a unique expression in the RNS system as X={x 1 ,x 2 ,...,x L}, in Denotes X for modulo m i remainder of . To operate on two operands in the remainder system, the operator is Θ, which can be defined as:

[0003] {z 1 ,z 2 ,…,z L}={x 1 ,x 2 ,...,x L}Θ{y 1 ,y 2 ,...,y L},in Here Θ can be modular addition, modular subtraction or modular multiplication. In a remainder system these arithmetic operations ...

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