The application relates to a modulus addition and modulus subtraction acceleration device based on a carry-save
adder and an
encryption device, wherein the modulus addition and modulus subtraction acceleration device comprises a modulus addition acceleration module and a modulus subtraction acceleration module; the modulus addition acceleration module carries out modulus addition on input addends and addends through three-stage cascaded
data compression circuits to output a modulus addition result with a modulus P, wherein a four-input CSA unit is used for modulus addition compression
processing in the first-stage
data compression circuit, and three-input CSA units are used for modulus addition compression
processing in the second-stage and third-stage
data compression circuits; the modulus subtraction acceleration module carries out bitwise inversion on a minuend, and then carries out modulus addition on the inverted minuend and the subtrahend through four-stage cascaded data compression circuits to output a modulus subtraction result with the modulus P, wherein a four-input CSA unit is used for modulus addition compression
processing in the first-stage data compression circuit, and three-input CSA units are used for modulus addition compression processing in the second-stage, third-stage and fourth-stage data compression circuits. The application realizes modulus addition and modulus subtraction operation acceleration, and improves circuit frequency.