Modular multiplier

Abstract

The invention discloses a modular (2<3n>-2<n>) multiplier, which comprises a 3n-bit binary multiplier, a 2n-bit CSA (Carry Save Adder) compressor array, a first 2n-bit binary adder, a one-bit phase inverter and a second 2n-bit binary adder. In the modular (2<3n>-2<n>) multiplier disclosed by the invention, the result P of binary multiplication is taken as an operand for reprocessing, and modulo addition operation is corrected in a way of adding 1 in advance, so that the operation speed is increased greatly. Compared with the prior art, the modular (2<3n>-2<n>) multiplier has the advantages that a multiplier and a combined logic circuit are reduced on resource cost; and on a key path, a multiplier is reduced.

Description

technical field [0001] The invention belongs to the field of computers and integrated circuits, and in particular relates to the design of a high-speed multiplier. Background technique [0002] Before introducing the multiplier, first explain the Residue Number Systems (RNS, Residue Number Systems). The remainder system RNS is a numerical representation system that describes numbers through the remainder of a set of pairwise coprime remainder bases. By L remainder base {m 1 ,m 2 ,...,m L} composition, integer X, 0≤X<M, where M=m 1 × m 2 ×…×m L , in the RNS system X consists of {x 1 ,x 2 ,...,x L} unique representation, where Denotes X for modulo m i remainder of . According to the Chinese remainder theorem, when the remainder system is converted into binary, X is determined by get, It can be seen that the operation modulo M is very important to the whole remainder system. [0003] {2 n ,2 n -1,2 n +1} is the most important and widely used computin...

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Problems solved by technology

[0004] The purpose of the present invention is in order to solve in the interconverting process of remainder system and binary operation system, modulus (2 3n -2 n ) The multiplier consumes resources and the speed is low. A modulo (2 3n -2 n ) multiplier

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