A data processing method and related device for FEC encoding and decoding

Abstract

A data processing method and related device for FEC encoding and decoding, the method comprising: performing FEC encoding on the data code block sequence output by the physical encoding sublayer on the FEC encoding processing sublayer with m data code blocks as a group to generate n FEC check code blocks; distribute m×t2 data code blocks and n×t2 FEC check code blocks to the M virtual channels of the first virtual channel group and the N virtual channels of the second virtual channel group respectively In the above, m×t2 is less than or equal to m_max, m_max is t1 times of M, n is less than or equal to n_max, n_max is t1 times of N, m, n, t1, t2 are positive integers; according to the bit variable speed multiplexing will be distributed to the first The data on one virtual channel group and the data distributed to the second virtual channel group are respectively multiplexed to at most H interfaces of the first physical channel group and at most K interfaces of the second physical channel group, where M is H Integer multiple, N is an integer multiple of K.

Description

technical field [0001] The embodiments of the present invention relate to the communication field, and in particular, to a data processing method and a related device for FEC encoding and decoding. Background technique [0002] Forward Error Correction (FEC, Forward Error Correction) codec technology is a technology used in communication systems to improve transmission system performance. The use of FEC requires the introduction of FEC encoding and decoding algorithms and processing devices at the source and sink ends of the transmission system, and the additional transmission of verification overhead data generated by FEC encoding at the source end in the transmission system. In a typical single-channel communication transmission system, the transmission of original information data and FEC verification overhead data is mainly realized by increasing the line transmission rate. For example, in a typical RS(255,239), the original 239-byte information is increased to 255 byte...

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Problems solved by technology

The FEC overhead provided by this method is limited, and the selected FEC has limited error correction capability, which is not suitable for the situation of higher actual line bit error rate, especially the system after introducing high-order modulation patterns.

In addition, this implementation method requires separate compression on each channel. If it is distributed to 4 channels, it will introduce 4 times the encoding and decoding delay, and introduce a relatively high FEC encoding and decoding delay for multi-channel systems, which is not suitable for low-latency requirements. occasion

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