The application relates to the technical field of high-speed digital
baseband transmission, and discloses a PCIe high-speed parallel-serial conversion port
station multi-split configuration structure, which changes the structure of a fixed-width port that cannot be split, enables a high-speed port to be dynamically split into multiple
independent channels to adapt to external devices of different widths, solves the problem of idle channels, and improves the utilization efficiency of physical channels and
bus bandwidths; the application introduces a
physical coding sublayer combination architecture and a dynamic selector, so that the same
hardware structure can support the overall access of high-bandwidth devices and can also be reconstructed into multiple independent links to access multiple low-bandwidth devices; different application topologies can be adapted without modifying a physical
layout, and the flexibility of
chip configuration is improved.