PCIE exchange chip port configuration system and method supporting virtual exchange

A technology of virtual switching and switching chips, applied in the field of PCIE switching chips, which can solve problems such as conflicts

Active Publication Date: 2020-05-01
成都华大九天科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In the above multi-host system, when multiple servers are connected through the same PCIE switch chip, if no partition is made, problems will occur, because multiple operating systems will enumerate the virtual bridge and I / O in the same PCIE system respectively. device, and assign access addresses to it, a conflict will occur at this time

Method used

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  • PCIE exchange chip port configuration system and method supporting virtual exchange
  • PCIE exchange chip port configuration system and method supporting virtual exchange
  • PCIE exchange chip port configuration system and method supporting virtual exchange

Examples

Experimental program
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Embodiment 1

[0082] In the embodiment of the present invention, the PCIE switch chip is externally connected with an Electrically Erasable Programmable Read-Only Memory (Electronically Erasable Programmable Read-Only Memory, EEPROM for short), and the internal registers of the switch chip are initialized and loaded through the externally connected EEPROM. The PCIE switch chip port configuration system supporting virtual switching has n ports, where n is a natural number not less than three. The data packets received by the PCIE switch chip are divided into four types according to different routing methods: data packets based on identification number (Identification, abbreviated as ID), data packets based on memory address routing, and input / output based on input / output (abbreviated as ID). IO address routed packets and implicit routing (Implicit Routing) packets. In addition, the configuration package of the PCIE switch chip cannot come from the downstream port.

[0083] Each port of the ...

Embodiment 2

[0103] image 3 For the PCIE switch chip port configuration system structure schematic diagram supporting virtual switch according to the present invention, the implementation mechanism of virtual switch is illustrated below as an example of an eight-port PCIE switch chip that can be divided into four virtual switches internally, as image 3 As shown, the PCIE switch chip is mainly composed of a physical layer interface, a port controller, a routing module, an EEPROM interface controller, a configuration module, and a crossbar switch. The PCIE switch chip is externally connected with an EEPROM chip used to initialize port registers.

[0104] The external EEPROM is used to save the configuration register address and configuration data used for the initialization of the port register of the PCIE switch chip.

[0105] The physical layer interface implements the functions of the physical medium adaptation layer and the physical coding sublayer of the PCIE physical layer.

[0106...

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Abstract

The invention discloses a PCIE exchange chip port configuration system and method supporting virtual exchange, and the system comprises: a port controller which is used for realizing the functions ofa medium access control layer, a data link layer and a transaction layer of a physical layer; a physical layer interface for realizing the functions of a physical medium adaptation layer and a physical coding sub-layer of a PCIE physical layer; a routing module which is used for receiving routing information from the port controller, carrying out routing lookup according to the routing informationand acquiring a processing mode and a transceiving port number of the data packet; an EEPROM interface controller for reading configuration information of an external EEPROM and sending the configuration information to the configuration module; a configuration module which is used for receiving configuration information, configuring the ports, configuring the ports as upstream ports or downstreamports, dividing a virtual switching area in the chip, and controlling each port to be enabled; and a crossbar switch for forwarding the data packet passing through the PCIE switching chip. The port configuration can be quickly completed, and the time limit requirement of PCIE switching chip initialization is met.

Description

technical field [0001] The invention relates to the technical field of high-speed interconnection bus (Peripheral Component Interconnect Express, PCIE) of computer peripheral equipment, in particular to a PCIE switching chip supporting virtual switching. Background technique [0002] With the development of computing technology, many high-density modular server platforms, or open blades, have emerged in recent years. Such server platforms require the connected PCIE switch to provide partitioning functions. [0003] figure 1 It is a schematic diagram of an existing multi-host system, such as figure 1 As shown, in the existing multi-host system, the three servers are connected through the same PCIE switch chip, and the partition configuration is done through the PCIE switch chip. According to the change of the task, the I / O device connected to the switch chip will Arbitrarily distributed among Server A, Server B, and Server C. When the basic input and output system BIOS (ab...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/24H04L12/931G06F13/20
CPCH04L41/0803H04L49/70G06F13/20G06F2213/0026
Inventor 杨珂张建波赵姣崔飞飞
Owner 成都华大九天科技有限公司
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