Method and device for message transmission

Abstract

The invention discloses a method and a device for message transmission. Based on the method and the device for message transmission, a logic chip at a sending end is used for receiving a data message to be sent from a CPU (Central Processing Unit) at a home terminal through a non-PCIE (non-Peripheral Component Interface Express) bus, byte filling for expressing the data loading length of the data message is increased for the received data message, then the byte filling of the data message and the data loading are packaged into a loading field of a TLP (Transmission Line Pulse) fragment and are sent to a receiving end through a PCIE bus; correspondingly, the logic chip at the receiving end is used for receiving the TLP fragment from the sending end through the PCIE bus, the data loading of corresponding length in the loading field of the TLP fragment is determined to be the data loading of the data message of the byte filling according to the byte filling for expressing the data loading length of the data message in the loading field of the TLP fragment, and then the data loading of the corresponding length determined according to the byte filling is recovered into corresponding data message and sent to the CPU at the home terminal through the non-PCIE bus. However, the bandwidth availability ratio of the PCIE bus can be improved based on the method and the device for message transmission.

Description

technical field [0001] The invention relates to a data message transmission technology, in particular to a message transmission method and device based on a PCIE (Peripheral Component Interconnect Express, high-speed peripheral component interconnection) bus. Background technique [0002] In the transmission process based on the PCIE bus, the data message needs to be encapsulated by the sending end into TLP (Transaction Layer Packet, transaction layer packet) fragments and transmitted to the receiving end, and then the receiving end decapsulates the data message from the TLP fragment . [0003] See figure 1 , both the sending end and the receiving end include a CPU with a PCIE interface, and the PCIE interfaces of the CPUs at the sending end and the receiving end are connected to each other through the PCIE bus; the CPU at the sending end is responsible for encapsulating the data payload of the data message to be sent into TLP fragments , and send TLP fragments to the rece...

AI Technical Summary

Problems solved by technology

[0020] It can be seen that the bandwidth utilization rate of the existing PCIE bus is not high

Moreover, since the Data field of a TLP fragment can only be exclusively occupied by the data load of the same data message, when the data load length M of the data message is small, the bandwidth utilization rate of the PCIE bus will be further reduced when the packet is transmitted. reduce

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