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Phase adjustable multi-channel clock signal synthesizing device

A clock signal and reference clock signal technology, applied in the direction of automatic power control, electrical components, etc., can solve the problem of narrow clock adjustment range, and achieve the effect of high precision and wide range

Inactive Publication Date: 2015-07-29
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Phase adjustment can also be achieved by using a digital delay line, but the range of clock adjustment is narrow

Method used

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  • Phase adjustable multi-channel clock signal synthesizing device
  • Phase adjustable multi-channel clock signal synthesizing device

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Embodiment

[0025] figure 1 It is a system structure diagram of the multi-channel clock signal synthesizing device with adjustable phase in the present invention. like figure 1 As shown, the phase-adjustable multi-channel clock signal synthesis device of the present invention includes a controller 1, a reference clock signal generation module 2, a clock fan-out module 3, and N groups of level generation modules 4 and a clock phase adjustment module 5, where N represents the need The number of synthesized clock signals, the specific description of each module is as follows:

[0026] Controller 1 according to the frequency value f of the clock signal to be generated c The generated frequency control signal is sent to the reference clock signal generation module 2, and the amplitude of the DC level signal that the corresponding level generation module 4 needs to generate is calculated according to the phase difference between each clock signal to be generated and the reference clock signal...

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Abstract

The invention discloses a phase adjustable multi-channel clock signal synthesizing device. The phase adjustable multi-channel clock signal synthesizing device comprises a controller, a reference clock generating module, a clock fanout module and N groups of level generation modules and clock phase adjustment modules. A reference clock signal generated by the reference clock signal generation module according to a frequency control signal sent by the controller is shunted through the clock fanout module to obtain N channels of reference clock signals, the N channels of reference clock signals are sent to the clock phase adjustment modules, the controller calculates the amplitude of a direct current signal to be generated by the corresponding level generation module according to the phase difference between the N channels of reference clock signals to be generated and the reference clock signal, level control signals are sent to the level generation modules, every level generation module generates two direct current level signals and sends the two direct current level signals to the clock phase adjustment modules, and the clock phase adjustment modules processes the reference clock signal according to the direct current level signals to generate the final clock signal. The phase adjustable multi-channel clock signal synthesizing device can achieve accurate clock signal phase adjustment during the generation of multi-channel clock signals.

Description

technical field [0001] The invention belongs to the technical field of clock signal synthesis, and more specifically relates to a multi-channel clock signal synthesis device with adjustable phase. Background technique [0002] The clock signal is the basic signal of the electronic system, which is widely used in various digital circuit systems, and is used as a timing basis to synchronize the operation of other unit circuits. The performance of the clock signal directly affects the performance index of the electronic system. [0003] The performance requirements of electronic systems for clock signals are not only reflected in stable frequency, amplitude, and excellent phase noise. In some special applications, multiple clock signals are required to work at the same time. On the one hand, these clock signals are required to be coherent, and on the other hand, the phases of these clock signals are required to be precisely controlled. [0004] Coherence can be achieved by us...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/16
Inventor 刘科郭广坤肖寅东田书林王厚军范洪涛
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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