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Variable-length radar pulse data caching method

A radar data and radar pulse technology, which is applied in the field of baseband variable-length radar pulse data cache, can solve the problems of data loss, inability to store data accurately, and time is not fixed.

Active Publication Date: 2015-12-23
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the pulse repetition period length of the radar pulse signal is not fixed, the time for storing a set of pulse data is not fixed, and the traditional ping-pong buffer method cannot meet the requirements for accurate data storage
Two kinds of errors usually occur: when the length of data in the ping-pong buffer storage area A being written is less than the length of the data read from the ping-pong buffer storage area B, in the case that the data in the buffer B is not read completely , the read-write switch of the ping-pong buffer will be switched, which will cause data loss; The data in the memory may cause data storage errors due to the superposition of two data

Method used

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Embodiment Construction

[0028] The non-destructive buffering method of variable-length radar echo data based on FPGA is used to simulate the situation that the period of the pulse signal in the environment where the radar transmits the pulse signal remains unchanged, becomes longer and shorter. Proceed as follows:

[0029] Step 1. Set the sizes of single-port RAM buffer areas A and B to meet the maximum radar pulse period. The write control module connects the input data interface to buffer area A, and the read control module connects the output data interface to buffer area B. Determine the parameters m and n according to the radar performance, so that the radar pulse period length can be reduced then read the time Then wait for the arrival of the pulse detection signal. Among them, l is the length of the radar pulse period, and △l is the variation of the radar pulse period length; t is the time required to read the data whose radar pulse period length is l under the system clock Clock; △t is t...

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Abstract

The present invention discloses a variable-length radar pulse data caching method, belongs to signal processing technologies and particularly relates to a data caching technology. An apparatus used in the method comprises a radar pulse detection module, a data writing control module, a data reading control module, a single-port RAM (Random Access Memory) cache area and a write address register. In the method, a write cache clock is twice of an input clock, data writing and clearing are performed alternately, and an address of the end of data is stored in the write address register as a calculation source of an ending address of a read module; and a read clock is m times of the input clock, and a read bit width is n times of a data bit width. Therefore, a read speed is much higher than a write speed; and thus the method of performing proper caching without bulk-level clearing after a radar pulse period changes is implemented.

Description

technical field [0001] The technical field of data signal processing of the present invention specifically refers to buffering of baseband variable-length radar pulse data. Background technique [0002] Data caching is a basic operation in the field of signal processing. When storing or computing a large amount of real-time data, it is usually necessary to cache first to ensure correct data processing. [0003] In the real-time storage of radar and its analog echo signals, the traditional method is to use a fixed-length ping-pong buffer area to ping-pong buffer and store the data, and then transmit the buffered data to a large-capacity storage device. The cache ping-pong operation is to allocate the data stream isochronously to two data buffer storage areas of the same size: the first buffer cycle stores the input data into the buffer storage area A. In the second buffering cycle, data is input to the buffer storage area B, and at the same time, the cached data in the buffe...

Claims

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Application Information

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IPC IPC(8): G06F12/08
Inventor 周云祖东辉卢霞霞周杨鹏汪学刚
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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