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Cell array calculation system and debugging method thereof

A cell array and computing system technology, applied in computing, computers, computing models, etc., can solve problems such as poor cost-effectiveness ratio and affect computer performance, and achieve the effect of good cost-effectiveness, efficient debugging, and overall performance improvement

Active Publication Date: 2016-06-29
SHANGHAI CIYU INFORMATION TECH CO LTD
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Problems solved by technology

[0009] The problem to be solved by the present invention is that the computer architecture in the prior art affects the improvement of the overall performance of the computer due to the communication bottleneck between the CPU, memory and storage, and makes the cost-effectiveness relatively poor

Method used

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  • Cell array calculation system and debugging method thereof
  • Cell array calculation system and debugging method thereof
  • Cell array calculation system and debugging method thereof

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Embodiment Construction

[0043] Due to the communication bottleneck between the CPU, the memory and the storage in the computer architecture of the prior art, the improvement of the overall performance of the computer is affected, and the cost-effectiveness is relatively poor.

[0044] After research, the inventor of the present application considers that if the three functions of memory, storage and calculation are integrated into one chip, a relatively simple unit with independent calculation and storage functions will be formed, and a large number of such units will form a dense network. Communication network, in order to realize the function of data broadcasting / group sending and the internal network capable of large-scale parallel transmission of data, a computing architecture similar to the human brain can be developed, which is equivalent to building a large number of microcomputers in one on chip.

[0045] To this end, the technical solution of the present invention provides a computing archit...

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Abstract

A cell array computing system and its debugging method, the cell array computing system includes: a main control CPU, a cell array and a cell array bus; the cell array is a two-dimensional or three-dimensional Array, wherein each cell includes a microprocessor and non-volatile random access memory; each cell stores its position in the cell array as an ID for software or hardware in the cell to read; the main control CPU passes through the cell array bus Communicate with each cell in the cell array; there are communication interfaces between adjacent cells, which can send data to each other; the cell array computing system also includes a debugging interface connected to the main control CPU, and the debugging device is controlled through the debugging interface The main control CPU debugs the software running in each cell of the cell array. The invention can overcome the communication bottleneck between the CPU, memory and storage in the existing computer architecture, and improve the overall performance of the system.

Description

technical field [0001] The invention relates to the technical field of computers and computer applications, in particular to a cell array computing system and a debugging method thereof. Background technique [0002] Generally speaking, a computer mainly includes three core parts: a central processing unit (CPU, Central Processing Unit), memory and storage. [0003] Through the unremitting efforts of some of the world's top companies, the CPU has evolved into an extremely complex semiconductor chip. The number of MOS tubes inside the top CPU core can exceed 100 million. The current industry trend is that it is difficult to increase the operating frequency of the CPU due to power consumption constraints. It is also difficult to improve the operating efficiency of the already extremely complex modern CPU. New CPU products are increasingly evolving towards multi-core. [0004] In terms of memory, the current dominant technology is Dynamic Random Access Memory (DRAM, Dynamic...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/00G06F15/163
Inventor 戴瑾郭一民王践识
Owner SHANGHAI CIYU INFORMATION TECH CO LTD
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