High-resolution clock phase-shift architecture and algorithm implementation method

Abstract

The present invention relates to a high-resolution clock phase shift architecture, including: coarse-grained clock phase delay chain DELAY_LINE1, clock phase selector CLK_PS_MUX1, fine-grained clock phase delay chain FINE_DELAY1, coarse-grained clock phase detector GENERAL_PD, fine-grained clock phase Phase detector FINE_PD, coarse-grained clock phase delay chain controller GENERAL_CTRL and fine-grained clock phase delay chain controller FINE_CTRL; at the same time, the present invention proposes a new algorithm, and obtains the input clock by twice phase discrimination and counter difference. Period, and then divide the input clock period into 360 equal parts to obtain the value of the counter corresponding to every 1 degree. The user can realize the phase shift of the clock by any degree by configuring the data of the corresponding degree to GENERAL_CTRL and FINE_CTRL.

Description

technical field [0001] The invention relates to the technical field of clock management, in particular to a high-resolution clock phase-shift architecture and an algorithm implementation method, which is used for phase shifting a clock by any degree. Background technique [0002] The digital clock management (DCM) in Field Programmable Gate Array (FPGA, Field Programmable Gate Array) mainly provides four functions: clock deskewing, frequency synthesis, phase shifting and dynamic reconfiguration. [0003] Phase shift is to move the phase of the clock according to the system settings or user requirements. Since the frequency of the input clock is different, that is, the period of the input clock is different, the unit of the phase shift is generally degrees. In many cases, a phase shift is required between the clocks. In FPGA, DCM can provide 180° and 90° phase shift, for example: CLK2X180, CLKFX180 are 180° phase shift versions of CLK2X and CLKFX respectively, CLK90, CLK180,...

AI Technical Summary

Problems solved by technology

[0004] Although DCM and PLL provide some phase-shifted versions of the clock, they are all fixed degrees and the resolution

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