Immunity test quantitative evaluation method for programmable logic controller (PLC)

A technology of programming controller and evaluation method, which is applied in the direction of program control, program control in sequence/logic controller, electrical program control, etc. It can solve problems such as downtime due to failure, counting or calculation errors, and increase in error frequency, etc., and achieves easy Realization, simple structure and strong operability

Active Publication Date: 2017-12-05
SHANGHAI ELECTRICAL APP RES INST +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, practical experience shows that when PLC accepts small to large external electromagnetic interference, individual counting or calculation errors often occur first, and then the error frequency gradually increases, and finally there will be a failure shutdown

Method used

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  • Immunity test quantitative evaluation method for programmable logic controller (PLC)
  • Immunity test quantitative evaluation method for programmable logic controller (PLC)
  • Immunity test quantitative evaluation method for programmable logic controller (PLC)

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Embodiment Construction

[0023] Taking the electrical fast transient burst immunity test as an example, the present invention will be further described in conjunction with the accompanying drawings, and specific implementation methods will be given.

[0024] In the present invention, there are two PLCs, one sends high-speed counting pulses as an accompanying test product, and the other PLC receives high-speed counting pulses as a test product, and counts the PLC counts under the condition of interference by electric fast transient pulse groups The number of errors received by the high-speed counting pulse signal; the cumulative number of errors is stored in the register of the tested PLC. After the EFT interference stops, the computer communicates with the tested PLC through the RS232 serial port and reads the number of errors in the high-speed counting pulse communication. The number of errors can quickly, accurately and effectively calculate the error rate. The greater the error rate, the greater the...

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Abstract

The invention provides an immunity test quantitative evaluation method for a programmable logic controller (PLC). The method is characterized by comprising the following steps: 1, an immunity test quantitative evaluation device is built; 2, high-speed counting pulses with a frequency of XHz and counting direction signals are generated by an accompany test sample, a high-speed counting pulse end of a tested sample is connected through a capacitive coupling clamp for counting, and during the process, interference signals generated by an interference pulse generator are injected to a power output line of a tested device, or, through the capacitive coupling clamp, the interference signals generated by the interference pulse generator are coupled to a high-speed counting pulse signal line; and 3, the ratio of the number of incorrect pulses to the total counted number of pulses during the operation time for one standard test is calculated. Through the method of the invention, judgment on the test results of the anti-interference ability of the PLC interference signals are guaranteed to be more effective, quantifiable and high accurate.

Description

technical field [0001] The invention discloses a quantitative evaluation method for an immunity test of a programmable controller, which belongs to the technical field of electronic measurement. Background technique [0002] Existing programmable logic controller (referred to as PLC), especially PLC with servo control function, its input and output interface needs to send and receive high-speed pulse, and accurate sending or receiving pulse is the basic requirement of PLC, but in the real environment Due to the existence of external electromagnetic interference, it often affects the operation of the PLC. In severe cases, it may cause PLC program errors or failure shutdowns, but the more common problem is that the PLC program can still run normally, and the waveform distortion caused by external interference on the power supply or signal , it is easy to cause individual errors in pulse sending or receiving. IEC electromagnetic compatibility test methods (including electrical...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05B19/05G05B19/048
CPCG05B19/048G05B19/058G05B2219/14097
Inventor 张军平翁祖昊陈淑芳薛吉琚长江
Owner SHANGHAI ELECTRICAL APP RES INST
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