Programmable neural network processor

Abstract

A programmable neural network processor disclosed by the present invention is used to detect and identify the targets in an image under an embedded environment, and comprises a storage and control module, a data cache module, a processing unit array, an instruction storage module, a data transmission network and a globe control module. The programmable neural network processor of the present invention adopts a transport triggered architecture (TTA), has a very long instruction word (VLIW) of executing a plurality of sub-instructions parallelly and a single instruction multiple data (SIMD) characteristic simultaneously, and adopts a plurality of direct memory access (DMA) channels, thereby improving the data transmission efficiency, and further improving the target detection and identification speed, and reducing the power consumption.

Description

technical field [0001] The invention belongs to the field of image processing, and further relates to a programmable neural network processor and a programming method thereof in the field of image processing in an embedded scene. The invention can be used to detect and recognize the target in the image in the embedded scene, can improve the processing speed and reduce the power consumption. Background technique [0002] For target detection and recognition using images in embedded scenarios, first of all, embedded scenarios require strict restrictions on system functions, reliability, cost, volume, and power consumption. Secondly, in the field of image detection and recognition, convolutional neural network is currently the only algorithm whose accuracy reaches the application level. The number of multiplication and addition operations required by a typical convolutional neural network is several times the number of multiplication and addition operations required by other t...

AI Technical Summary

Problems solved by technology

The shortcomings of the processor are: first, the processor can only execute one common instruction at a time, and the efficiency of the system data channel is low, so that the target detection and recognition speed of the image in the embedded scene is low; second, the processor The processor does not provide a solution for convolutional neural network pooling operations and a dedicated data path, which will lead to limitations in the selection of neural network structures in the process of image detection and recognition in embedded scenarios, resulting in low detection and recognition accuracy

The shortcomings of this IP core are: in the process of target detection and recognition in embedded scenarios, its coprocessor does not have the characteristics of modular construction, which leads to cumbersome control structures, reduces the parallelism of the system, and further reduces the Speed ​​of object detection and recognition in embedded scenarios

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