A control method and system for realizing semaphore order preservation in systemverilog

Abstract

The invention provides a control method and system for realizing semaphore order preservation in systemverilog, which determines whether the current request source is waiting according to the value of a static variable, and determines whether the current request source is interrupted according to whether the value in the associative array is a special value. Implement order-preserving control of semaphore. The present invention constructs encapsulation classes, sets static variables, associative arrays, checks the function of returning key quantity and order preservation function, when requesting to apply for a key, according to the record value in the associative array, it is determined whether the previous request is blocked, so as to decide the present invention. Whether the second request is interrupted, so as to ensure the processing order of the request, solve the hidden defects of semaphore in the existing systemverilog and the situation that may cause the request to be out of order, make full use of the life cycle of static variables and the built-in associative array can be added at any time Or delete the characteristics of the element, supervise and effectively control the key return of the semaphore and the request for the key.

Description

technical field [0001] The invention relates to the field of server testing, in particular to a control method and system for realizing semaphore order preservation in systemverilog. Background technique [0002] With the increase in the logic scale and complexity of VLSI (Very Large Scale Integration, VLSI), the previous method of building a testbench with verilog has gradually failed to meet the verification requirements of large-scale chips, and the complexity of verification has become increasingly high. , the more powerful and comprehensive the functionality of the verification platform is required, the more abstract and reusable advanced verification methods have become the mainstream. Today's mainstream integrated circuit verification methodology is more built with systemverilog or based on systemverilog, such as: UVM (Universal Verification Methodology, universal verification methodology). Communication control between threads is an important part. Multiple requests...

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a control method and system for realizing semaphore order preservation in systemverilog, aiming to solve the hidden defects of semaphore in existing systemverilog and the situation that may cause requests to be out of order, and realize key return and request to semaphore Key requests are supervised and effectively controlled

Images