Isolation capacitor and isolation circuit

A technology of isolating capacitors and isolating circuits, applied in circuits, logic circuit coupling devices, logic circuit connection/interface layout, etc., can solve the problems of AC signal attenuation, high cost, long cycle, etc., and achieve reinforced isolation and reduce attenuation. the effect of reducing parasitic capacitance

Active Publication Date: 2020-06-23
3PEAK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] 1. There is a large parasitic capacitance between the upper and lower plates of the capacitor and the substrate, which will cause a relatively large attenuation of the transmitted AC signal;
[0009] 2. To achieve a h

Method used

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  • Isolation capacitor and isolation circuit
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  • Isolation capacitor and isolation circuit

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Embodiment Construction

[0042] The present invention will be described in detail below in conjunction with various embodiments shown in the drawings. However, these embodiments do not limit the present invention, and structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.

[0043] The invention discloses an isolation capacitor, which includes a substrate, a dielectric layer on the substrate, and electrode lines on the dielectric layer, the electrode wires include first electrode lines and second electrode lines arranged at intervals, and the isolation capacitor The first electrode line and / or the second electrode line is electrically connected to an external chip or system to realize electrical isolation.

[0044] The invention also discloses an isolation circuit, which includes:

[0045] The first chip includes a first substrate and several signal sending units and / or signal receiving un...

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PUM

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Abstract

The invention discloses an isolation capacitor and an isolation circuit. The isolation capacitor comprises a substrate, a dielectric layer positioned on the substrate and electrode wires positioned onthe dielectric layer; and the electrode wires comprise a first electrode wire and a second electrode wire which are arranged at an interval, and the isolation capacitor is electrically connected withan external chip or system through the first electrode wire and/or the second electrode wire so as to realize electrical isolation. According to the isolation capacitor, the dielectric layer is arranged on the substrate, and the two stages are arranged on the surface of the dielectric layer, so that the parasitic capacitance between the polar plates is reduced, the attenuation in the AC signal transmission process is reduced, and back-to-back enhanced isolation can be realized; and the magnitude of the isolation voltage can be achieved by changing the distance between the two electrode wires,the preparation process does not need to be changed, and the process cost is greatly reduced.

Description

technical field [0001] The invention belongs to the technical field of isolation circuits, and in particular relates to an isolation capacitor and an isolation circuit. Background technique [0002] Isolation capacitors, especially high-voltage capacitive isolation circuits, are increasingly used in signal transmission between chips or systems in different voltage domains. It can provide electrical isolation of up to several thousand volts between two or more chips or systems. Realize the "ground" isolation between different voltage domains, and improve the reliability of chips or systems. [0003] A high-voltage capacitive isolation circuit is usually composed of a transmitter (TX), a receiver (RX) and a high-voltage isolation capacitor. The high-voltage isolation capacitor is used to complete the transmission of AC signals while blocking the passage of DC signals, thereby achieving high-voltage isolation. [0004] High-voltage isolation capacitors are usually realized by ...

Claims

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Application Information

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IPC IPC(8): H01L23/522H03K19/0175
CPCH01L23/5223H03K19/017545
Inventor 陶园林
Owner 3PEAK INC
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