Composite cache directory system and management method thereof

Abstract

The invention provides a composite cache directory system and a management method and device thereof, and a storage medium. The composite cache directory system comprises a cache line cache directorysubsystem, an address block cache directory subsystem and a result integration module. The cache line cache directory subsystem comprises a cache line cache directory and a control module of the cacheline cache directory, the cache line cache directory subsystem comprises a plurality of cache line directory entries used for storing attribute information of a part of cache lines, and the control module is used for searching a specified cache line in a cache directory of the cache line and updating a directory entry of the cache line. The address block cache directory subsystem comprises an address block cache directory and a control module of the address block cache directory, the address block cache directory comprises a plurality of address block directory entries used for storing attribute information of the other part of cache lines in the form of address blocks; and the control module is used for searching a specified cache line in an address block cache directory and updating anaddress block directory entry; and the result integration module is used for integrating search results and determining whether to allocate address block directory entries to the specified cache lines.

Description

technical field [0001] The present disclosure relates to cache directory technology, and more specifically, to a compound cache directory system and its management method, device and storage medium. Background technique [0002] The address track of the processor accessing the main memory can usually be divided into two types, the first type is relatively discrete access, the address track of this type of access is more random, the second type is relatively continuous access, because the processor operating system allocates the main memory The memory is usually in the page unit, and due to the spatial locality of software operations, the source of such access (the processor that initiates the access) and the order of access are relatively fixed within a certain range. The current mainstream cache directories mainly include single-level cache directories with cache behavior monitoring granularity, single-level cache directories with larger address range (address block) as the...

AI Technical Summary

Problems solved by technology

For the first type of access, the cache line cache directory is usually used, which has high monitoring accuracy but occupies a large chip area, while for the second type of access, the address block cache directory is usually used, which has larger capacity and better scalability, but its monitoring The precision is low and it will lead to a large number of unnecessary detections. Therefore, a multi-level cache directory that combines the cache line cache directory and the address block cache directory appears

However, the current multi-level cache directory is only a simple combination of these two single-level cache directories, and cannot realize the combination and optimization of the two single-level cache directories to learn from each other's strengths.

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