Compound cache directory system and management method thereof

Abstract

The present disclosure provides a composite cache directory system and a management method, device and storage medium thereof. The composite cache directory system includes: a cache line cache directory subsystem, including a cache line cache directory and a control module thereof, wherein the cache line cache directory includes a plurality of cache line directory entries for storing attribute information of a part of the cache line, which controls The module is used to find the specified cache line in the cache line cache directory and update the cache line directory entry; the address block cache directory subsystem includes the address block cache directory and its control module, wherein the address block cache directory includes the address block cache directory. A plurality of address block directory entries that store attribute information of another part of the cache line in the form of a block, and its control module is used to find the specified cache line in the address block cache directory and update the address block directory entry; and the result synthesis module, with Used to synthesize the lookup results and determine whether to allocate an address block directory entry for the specified cache line.

Description

technical field [0001] The present disclosure relates to cache directory technology, and more particularly, to a composite cache directory system and a management method, device, and storage medium thereof. Background technique [0002] The address trajectory of the processor accessing the main memory can usually be divided into two categories. The first type is relatively discrete access, the address trajectory of this type of access is relatively random, and the second type is relatively continuous access. The unit of memory is usually a page, and due to the spatial locality of software operations, the source of such access (the processor that initiates the access) and the order of access within a certain range are relatively fixed. The current mainstream cache directories mainly include a single-level cache directory with a cache behavior monitoring granularity, a single-level cache directory with a larger address range (address block) as the monitoring granularity, or a ...

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Problems solved by technology

For the first type of access, the cache line cache directory is usually used, which has high monitoring accuracy but occupies a large chip area, while for the second type of access, the address block cache directory is usually used, which has larger capacity and better scalability, but its monitoring The precision is low and it will lead to a large number of unnecessary detections. Therefore, a multi-level cache directory that combines the cache line cache directory and the address block cache directory appears

However, the current multi-level cache directory is only a simple combination of these two single-level cache directories, and cannot realize the combination and optimization of the two single-level cache directories to learn from each other's strengths.

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