Design method of four-channel single-bit digital receiver and receiver thereof

Abstract

The invention discloses a four-channel single-bit digital receiver and a design method thereof. The method comprises the steps: carrying out the single-bit sampling of a signal, obtaining a single-bit digital signal, analyzing the harmonic characteristics of the single-bit digital signal in a Nyquist sampling frequency band, and obtaining four frequency bands which do not contain a target harmonic component; designing a four-channel single-bit digital receiver model according to the four frequency bands without the target harmonic component; and performing a simulation test according to the four-channel single-bit digital receiver model and preset test parameters to obtain a test result. Through the design of the special frequency band, higher harmonics can be effectively avoided, the spurious-free dynamic range of single-bit digital signals in each channel can be effectively improved, the instantaneous dynamic range of the receiver can be improved, the real-time processing capacity of the receiver can be enhanced, and the designed four-channel single-bit digital receiver has the advantages of simple structure and low cost. The device has the advantages of simple structure, strong anti-noise capability, high instantaneous dynamic range and the like.

Description

technical field [0001] The invention belongs to the technical field of digital receivers, and in particular relates to a design method of a 4-channel single-bit digital receiver and the receiver thereof. Background technique [0002] In order to apply to various complex conditions, modern radar signal detection requires a high-performance instantaneous frequency measurement receiver with low cost, small size, ultra-high response speed, large instantaneous broadband and the ability to process multiple signals at the same time, single-bit digital reception The machine can replace the traditional frequency measuring receiver to a certain extent and can meet the above requirements. The main advantage of the single-bit digital receiver is that the hardware structure is simple and the calculation of the discrete Fourier transform (DFT) does not require multiplication, which can quickly process broadband signals and save resources. However, the instantaneous dynamic range of the si...

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Problems solved by technology

For example, "Design and Performance Evaluation of a 2.5-GSPS Digital Receiver, Chien-In Henry Chen, IEEE Transactions on Instrumentation and Measurement, 2005, 54 (3)" (a design and performance evaluation of a 2.5-GSPS digital receiver, Chien-In Henry Chen, IEEE Transactions on Instrumentation and Measurement, published in 2005, Volume 54, Issue 3), this paper proposes a digital receiver with a sampling rate of 2.5GHz using a combination of a 4-bit digital-to-analog converter (ADC) and a 12-point kernel function. The instantaneous dynamic range of the receiver is improved by increasing the number of ADC digits and improving the kernel function of Fourier transform. At the same time, a compensation matrix method is proposed to suppress harmonics and further optimize the instantaneous dynamic range of the receiver. However, the shortcomings of this method are: 1) Although the multiplication operation in the FFT calculation process can be avoided by simplifying the number of bits of the kernel function, since the number of bits of the ADC is increased to 4 bits, compared with the single-bit sampling digital receiver, the receiver designed in this paper still has Computational complexity increases, thereby increasing power consumption and computing resources; 2) Using the compensation matrix method to suppress harmonics will lead to poor real-time performance of the frequency measurement receiver designed in this paper, and requires a large amount of storage resources. In addition, the use of the compensation matrix method has high requirements for frequency measurement accuracy. If the frequency measurement accuracy is improved only by increasing the scale of FFT, the resources to be consumed will increase exponentially, and the current programmable chips cannot meet the requirements; and if using The super-resolution estimation algorithm proposed in this paper is used to improve the frequency measurement accuracy, and the harmonic suppression effect is poor at low signal-to-noise ratio, and even new harmonics will be generated; 3) The current low-bit ADC sampling rate It has reached several times or even ten times the sampling rate of the 4-bit ADC used in this article. It can be seen from 2) that the compensation matrix method used in this article is no longer applicable at high sampling rates

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