Digital processing circuit

Abstract

The invention discloses a digital processing circuit, comprising a logic unit comprising at least one combinational logic device, the combinational logic device comprising at least one input end; and the filtering unit is used for dividing the waveform of the received initial input signal into at least two sections of waveforms in one period of the clock signal of the combinational logic device and preventing burrs contained in at least one section of waveform from spreading backwards so as to provide a filtered input signal to the input end of the combinational logic device. According to the invention, the filtering unit prevents the burrs contained in at least one waveform in the initial input signal from spreading backwards, and can eliminate the influence of the burrs in the signal on the power consumption of the whole circuit in time, thereby effectively reducing the extra power consumption caused by the burrs.

Description

technical field [0001] This application relates to the technical field of integrated circuit design, and more particularly to digital processing circuits. Background technique [0002] With the continuous development of power electronics technology, people have higher and higher requirements for the performance of electronic equipment. Among them, power consumption is one of the main factors hindering the development of electronic equipment. [0003] Power consumption in digital processing circuits is mainly divided into dynamic power consumption and static power consumption. The static power consumption generally comes from the leakage current of the CMOS device itself, which accounts for a small proportion in the power consumption of the digital processing circuit. Dynamic power consumption is mainly due to the change of state in each combinational logic device in the circuit. Part of the change of state is to implement a logic function, and part of it is due to false t...

AI Technical Summary

Problems solved by technology

The above-mentioned burrs usually do not affect the actual function of the digital processing circuit during the charging and discharging process of the load capacitance, but will cause more unnecessary power consumption

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