High-precision number cosine converting circuit without multiplier and its conversion

Abstract

The invention is a high rigorous number cosine commutation and quantified method without multiplier. Two shifters and one plus-subtracter complete the number cosine commutation with the scale coefficient-s, instead of one multiplier. The commutation export result multiplies with L in order to get DCT commutation result, and s divides quantified coefficient to get the L. The hardware circuit can avoid using the energy-consuming multiplier by selecting given number. It is a kind of no multiplier DCT commutation with massive parallel and consistency. The hardware account unit can be used for many times so the hardware circuit is very simple. The DCT and IDCT can be realized though a hardware circuit and get high account precision.

Description

technical field

[0001] The invention relates to a digital cosine transformation circuit without a multiplier and a transformation method thereof. Background technique

[0002] In the encoding process of most static image compression standards (such as JPEG) and dynamic image compression standards (such as MPEG1, MPEG2, MPEG4, H263, etc.), the original image data (or motion The estimated image data) is transformed from the time domain to the frequency domain, and then the frequency domain signal (that is, the result of the DCT) is quantized by a quantizer, and finally the quantized frequency domain signal is compressed. During this process, the quantizer completes the operation of dividing the frequency domain signal by a specific quantization coefficient, usually by multiplying the frequency domain signal by the reciprocal of the quantization coefficient.

[0003] The decoding process is as follows: first decompress the compressed code stream to obtain the quantized frequen...

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