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166results about How to "Reduce decoding delay" patented technology

Signal source and channel combined optimized adaptive error control method

The invention discloses an adaptive error control method for source channel coding combined optimization, which is characterized in that the source coding output code streams are classified to the following three grades according to the significance: significance, secondary significance and non-significance; and during the channel coding process, the source code streams of the three graders undergo the adaptive unequal error protection by means of variable-velocity forward error control/hybrid automatic repeat request (FEC/HARQ), so as to allow the transmission rate and the channel coding rate of the source code streams to be adjusted adaptively according to the time-varying fading characteristics of the wireless channel, thereby optimizing the transmission quality of the source code streams and improving the transmission efficiency and the channel utilization rate of the whole system. The method comprises the six steps, overcomes the problems of contradiction and resource waste caused by the independent coding of the source and the channel in the prior communication system, achieves the effect of adaptive combined optimization of the source code stream transmission rate and the channel coding rate based on the time-varying fading characteristics of channel, and has good application prospects.
Owner:BEIHANG UNIV

Turbo code high-speed decoding method based on parallel and windowing structure

ActiveCN103873073AIncrease decoding speedReduce the number of RAMError correction/detection by combining multiple code structuresSlide windowComputer module
The invention relates to a Turbo code high-speed decoding method based on a parallel and windowing structure, wherein the method is achieved through a Turbo code high-speed decoder. The method relates to a first input buffer module, a second input buffer module, a first extrinsic information storage module, a second extrinsic information storage module, a interweaving/de-interweaving module, N SISO decoding units, a hard-decision module and an output buffer module, wherein the first input buffer module and the second input buffer module continuously receive data frames input from the exterior in a ping-pong operating mode, first component decoding and second component decoding iterated for the first time are completed through the N SISO decoding units, in this way, first component decoding and second component decoding iterated for the Nth time are completed, iteration is ended, LLR information obtained through the second component decoding iterated for the Mth time is subjected to de-interweaving, the de-interweaving result is subjected to a hard decision, and finally, the hard decision result is stored in the output buffer module. According to the method, the advantages of parallel decoding and sliding window decoding are combined, the decoding running speed is substantially increased, and the good decoding property is achieved.
Owner:BEIJING RES INST OF TELEMETRY +1

Coding and decoding methods of ode of tail-biting staircase codes

ActiveCN105429646AGuaranteed error correction performanceTroubleshoot issues where uncorrected errors are affecting overall performanceError correction/detection using convolutional codesError correction/detection by combining multiple code structuresComputer architectureBlock code
The invention relates to a tail-biting staircase code coding method. The tail-biting staircase code coding method comprises the following steps: 1) selecting an (n, k) linear block code as a component code, wherein n represents a code length, n belongs to (500, 5000), and k represents an information length before coding; and 2) grounding received information according to a mode in staircase codes, constructing a matrix B<1>, B<2>, B<3>, ..., B<n>, adding a full-zero matrix participating the coding to a lower part of B<1>, coding the residual matrix using the component code then, generating a check bit matrix while the coding, completing end-to-end connection of codes of a final matrix and a first matrix in a group then, finally replacing the full-zero matrix complemented in the B<1> with the check bit matrix, and completing the coding. The coding method is advantageous in that, through adoption of the novel coding scheme, the novel tail-biting staircase codes have a characteristic of the block code, coding processes between groups are mutually independent, information of each matrix in the groups is still contained in the two component codes, and error correction performance is guaranteed.
Owner:NANJING UNIV

Method for reducing decoding time delay of polarization code

The invention discloses a method for reducing decoding time delay of a polarization code. The method comprises that an initial value of a logarithm likelihood ratio is calculated; recursive traversal is carried out on a decoding tree; special nodes carry out decoding in the traversal process; non-special nodes use a verification matrix to reduce decoding time delay in the traversal process; and a final decoding result is selected according to cyclic redundancy check. In the process of recursive traversal of the decoding tree in polarization code decoding, the verification matrix of the polarization code is used for verification, recursive traversal is not carried out on sub-nodes any more when verification fails, the decoding time delay is reduced effectively, and determination via the verification matrix can be carried out with other steps simultaneously, so no extra decoding time delay is caused. The method of the invention can be used to reduce decoding time delay of a successive cancel method substantially; compared with a classic low-time-delay brief propagation decoding method, the time delay characteristic of the method in the invention can approach that of brief propagation decoding, and the method of the invention is better than brief propagation decoding in the aspects of error rate performance and computing complexity; and the higher the signal to noise ratio is, the more obviously the decoding time delay is reduced.
Owner:上海瀚芯实业发展合伙企业(有限合伙)

Encoding and decoding method for improving decoding efficiency by pilot frequency information and device thereof

The invention discloses an encoding and decoding method for improving decoding efficiency by pilot frequency information and a device thereof. The method comprises the following steps that: pilot frequency sequences are evenly inserted into an information sequence before encoding, and the information sequence is subjected to error correction encoding by an error correcting code; the encoded information sequence is generated into an OFDMA symbol after IFFT conversion, and is transmitted to a receiving end; the receiving end carries out FFT conversion on the received information sequence to obtain soft information corresponding to the information sequence which is encoded by a transmitting end; the positions of the pilot frequency sequences inserted into the information sequence are set into corresponding soft information values according to values of the pilot frequency sequences; and the information is subjected to error correcting decoding to obtain transmitting information of the transmitting end. The method and the device can improve the velocity of convergence and decoding performance of an error correcting decoder, reduce the times of decoding iteration, reduce decoding time delay, and simplify the process of decoding.
Owner:西安新邮通信设备有限公司

Polarization code-based low-complexity PDCCH (Physical Downlink Control Channel) channel blind detection method

The invention discloses a polarization code-based low-complexity PDCCH (Physical Downlink Control Channel) channel blind detection method, which belongs to the field of communication. Firstly, a candidate DCI (Downlink Control Information) format which needs to be detected is determined; PDCCH candidates are then extracted one by one for decoding, d decoding results are obtained, and d path metricvalues CM are calculated at the same time; a decoding result which is checked to be correct is screened from the d decoding results; when the number of results is greater than 1, the information length corresponding to the smallest metric value is selected as the result for the current candidate PDCCH; when all PDCCH candidates do not have an information sequence conforming to CRC check, the information length corresponding to the smallest metric value CM is selected as the DCI information length actually carried by the current candidate PDCCH; and finally, CASCL decoding is carried out according to the information digit number carried in the current candidate PDCCH, an RNTI is descrambled for checking the CRC, if the CASCL decoding succeeds in checking, the correct result of the currentcandidate PDCCH is found out, or otherwise, a next candidate PDCCH is selected until the search is completed. The complexity of blind detection is reduced, and the practicability is good.
Owner:BEIHANG UNIV

Ahead-of-time stopping method of low complexity LDPC code weighting bit flipping decoding algorithm

The invention discloses an ahead-of-time stopping method of a low complexity LDPC code weighting bit flipping decoding algorithm. The method includes the steps that S1, initializing is conducted; S2, the syndrome s is calculated through z, wherein the s={s1, ...sm, ...sM}= zH<T>, sm=mod(sigma n<A (m) zn, 2), the expression of the sm is shown in the specification; S3, when the s is equal to zero, iteration is stopped, and decoding output is z; when the s is not equal to zero, if k>=Kmax, decoding fails, and decoding is over; if k<Kmax and k=k+1, the flipping function {En, 1<=n<=N} of each information node is calculated; the maximum value (please see the specification for the formula) of the flipping function is solved, and if MAX<0, decoding is over; otherwise, the z is updated, and iteration continues. According to the ahead-of-time stopping method of the low complexity LDPC code weighting bit flipping decoding algorithm, after the flipping function {En, 1<=n<=N} of each information node is obtained through calculation, the maximum value of the flipping function is solved, if MAX<0, the iterative process is stopped directly, wherein the expression of the MAX is shown in the specification, and otherwise iteration still continues according to the original steps; the non-error correction frame decoding process can be discovered and stopped in time, waste of hardware resources is avoided, and decoding time delay is lowered. Simulation results show that under the condition that the bit error rate and the frame error rate basically remain unchanged, the average iterations of the weighting bit flipping decoding algorithm can be greatly decreased, and therefore the system time delay and the implementation complexity are lowered.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Dynamic allocation method for decoding iteration of transmission block of topological code of long term evolution (LTE) system

The invention provides a dynamic allocation method for decoding iteration of a transmission block of a topological code of a third generation partnership project (3GPP) long term evolution (LTE) system. According to the method, within the maximum processing time delay of the transmission block, the remained iterative decoding time delay of encoding blocks which are decoded successfully in advanceis re-allocated to the encoding blocks which cannot be successfully decoded temporarily by effectively utilizing decoder hardware resources and the processing time delay allocated to the current transmission block, so that the decoding performance of the whole transmission block is improved. The method mainly comprises the following steps of: limiting the processing time delay of the transmissionblock by setting the maximum iterations of each encoding block, wherein the each encoding block of the transmission block in the LTE adopts an iterative decoding algorithm based on maximum posterior probability; firstly, carrying out iterative decoding on the encoding blocks sequentially, carrying out cyclic redundancy check simultaneously, and counting the iterations for dynamic allocation according to a check result; and when decoding of all of the encoding blocks is finished, averagely allocating the counted iterations to the encoding blocks which are not decoded successfully, and continuing carrying out the iterative decoding on the encoding blocks according to the iterations obtained by allocation.
Owner:SOUTHEAST UNIV

Data transmission method and apparatus

The invention discloses a data transmission method and apparatus. The method comprises the steps of enabling a receiving device to receive at least two packets of data from a sending device, each packet including at least one information CB (Code Block); enabling the receiving device to perform decoding on information CBs in the each packet and send indication information to the sending device, the indication information including information for indicating a decoding error packet, and information for indicating the number M of information CBs with a decoding error in the decoding error packet, and the decoding error packet being a packet where an information CB with the decoding error is located; enabling the receiving device to receive first check CBs from the sending device, the numberN of the first check CBs being greater than or equal to the M, and the first check CBs being obtained by encoding the information CBs in the decoding error packet; and enabling the receiving device toperform decoding on the information CBs in the decoding error packet according to the first check CBs. By adopting the data transmission method and apparatus provided by the embodiments of the invention, the data transmission method and apparatus have the advantages that the decoding complexity of transmission data can be reduced, the data transmission efficiency is improved and the transmissionresources are saved.
Owner:HUAWEI TECH CO LTD
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